Product Announcement from Altera Corporation

Cyclone V 28-nm FPGAs: Low cost, low power-Image

Altera's Cyclone® V FPGAs provide an unparalleled combination of high functionality, low system cost, and the lowest power of any 28-nm FPGA. Cyclone V FPGAs, enhanced with integrated transceivers and hard memory controllers, are ideal for differentiating your high-volume applications. Cyclone V FPGAs also come in system-on-a-chip (SoC) variants that embed an ARM®-based hard processor system (HPS). Cyclone V FPGAs are suitable for your applications in the industrial, wireless, wireline, military, and automotive markets.

The Cyclone V device family comes in six targeted variants:

FPGAs

• Cyclone V E FPGA with logic only

• Cyclone V GX FPGA with 3.125-Gbps transceivers

• Cyclone V GT FPGA with 5-Gbps transceivers

SoC FPGAs

• Cyclone V SE SoC FPGA with ARM-based HPS and logic

• Cyclone V SX SoC FPGA with ARM-based HPS and 3.125-Gbps transceivers

• Cyclone V ST SoC FPGA with ARM-based HPS and 5-Gbps transceivers

The devices are built on TSMC's 28-nm, which brings down the power and cost, giving you:

• Up to 40 percent lower total power compared to Cyclone IV GX FPGAs

• Lowest power serial transceivers with 88-mW maximum power consumption per channel at 5 Gbps

• Over 4,000 MIPS (Dhrystones 2.1 benchmark) processing performance for under 1.8 W (for SoC FPGA)

• Unparalleled use of hard intellectual property (IP) blocks for lower power and system cost

• Multiple bond pitch options and small form factor options

Because Cyclone V FPGAs integrate an abundance of hard IP blocks, you can differentiate and do more with less overall system cost, power, and design time. Key hard IP blocks include the following:

• Hard memory controllers supporting 400-MHz DDR3 SDRAM, DDR2, and LPDDR2 with optional

• PCI Express® (PCIe®) Gen1 and Gen2 with multifunction support

• Fractional synthesis phase-locked loops (PLLs) to replace voltage-controlled crystal oscillators (VCXOs)

• Variable-precision digital signal processing (DSP) blocks

• HPS (for SoC FPGA) includes a dual-core ARM Cortex™-A9 MPCore™ processor, embedded peripherals (Ethernet, USB, flash memory, and more), and high-bandwidth (>125 Gbps) HPS-FPGA interconnect

To protect your valuable IP investments, Cyclone V FPGAs also provide comprehensive design protection, with features including 256-bit Advanced Encryption Standard (AES) with volatile and non-volatile keys.

To ensure a smooth, successful design flow so you can turn your ideas into revenue quicker than ever before, Altera provides a complete design environment including:

 
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