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Schroff - PXI backplanes

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  • Clock switch over/clock generation on the backplane
  • 64-bit bus width, system slot on the left
  • 12-layer structure, min. crosstalk digital to analogue section
  • Outstanding high-frequency noise suppression and very high MTBF due to ceramic capacitors
  • Bridgeable

Standard Product options:

PXI backplane

  • 64-bit bus width, system slot on the left
  • 12-layer structure, min. crosstalk digital to analogue section
  • Bridgeable

PXI Bridge

  • PXI Bridge, 64 bit

Standards:

  • PICMG 2.0 R3.0 CPCI Core Specification
  • PICMG 2.1 R2.0 Hot Swap Specification
  • PICMG 2.8 D0.7 Pin Registration for PXI
  • PICMG 2.9 R1.0 System Management Specification

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