Si533xx Low-Jitter Clock Buffer ICs
Product Announcement from Silicon Labs
Silicon Labs' Si533xx low-jitter clock buffer ICs are the industry’s first universal clock buffers capable of replacing LVPECL, LVDS, CML, HCSL and LVCMOS buffers with a single IC, eliminating the need for multiple fixed-format buffers. The Si533xx devices integrate common clock tree functions and are purpose-built to address the demanding requirements of communications, data center, wireless infrastructure, broadcast video and embedded computing applications.
The flexible, highly-integrated Si533xx clock buffer IC family simplifies clock trees, reduces design complexity and eliminates procurement headaches. The clock buffers feature:
- Pin-selectable signal format per bank (LVPECL, Low Power LVPECL, LVDS, CML, HCSL, LVCMOS)
- Ultra-low additive jitter: 100 fs rms (12 kHz - 20 MHz)
- High performance, low jitter architecture (maximizes jitter margin for other components)
- Wide operating frequency 1 MHz - 1.25 GHz
- Low output-output skew: <50 ps
- Selectable LVCMOS drive strength to tailor jitter and EMI performance
Get the data sheet:
Si53302 1:10 Low Jitter Universal Buffer/Level Translator with 2:1 Input Mux
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