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Architecture:

Interface Type:

Input Type:

IC Package Type:

Production Status:

Screening Level:

Packing Method:

Pin Count:

Resolution:

bits

DNL:

LSB

INL:

LSB

Power Dissipation:

Sample Rate:

SNR:

dB

SINAD:

dB

SFDR:

dB

Input Voltage Range (Vpp):

Allow up to: overrange/margin
Use the overrange/margin to restrict your search to items whose full-scale range is close to your requirements.
(Overrange/margin requires both 'From' and 'To' values to work.)

Operating Temperature:

Allow up to: overrange/margin
Use the overrange/margin to restrict your search to items whose full-scale range is close to your requirements.
(Overrange/margin requires both 'From' and 'To' values to work.)

Reference Access:

Single Supply?

On-Chip ESD Protection?

Help with Analog-to-Digital Converter (ADC) Chips specifications:

General Specifications
   Architecture       
   Your choices are...         
   Flash (Parallel)       The ADC flash architecture uses a set of 2n-1 comparators to directly measure an analog signal to a resolution of n bits. For a 4-bit flash ADC, for instance, the analog input is fed into 15 comparators, each of which is biased to compare the input to a discrete transition value. The flash architecture has the advantage of being very fast, because the conversion occurs in a single ADC cycle. The disadvantage to this approach is that it requires a large number of comparators 
   Pipeline       The ADC pipeline architecture effectively overcomes the limitations of the flash architecture. A pipelined converter divides the conversion task into several consecutive stages. Each of these stages consists of a sample and hold circuit, an m-bit ADC (e.g., a flash converter), and an m-bit D/A converter (DAC). First the sample and hold circuit of the first stage acquires the signal. The m-bit flash converter then converts the sampled signal to digital data. The conversion result forms the most significant bits of the digital output. This same digital output is fed into an m-bit digital-to-analog converter, and its output is subtracted from the original sampled signal. The residual analog signal is then amplified and sent on to the next stage in the pipeline to be sampled and converted as it was in the first stage. This process is repeated through as many stages as are necessary to achieve the desired resolution. Pipelined converters achieve higher resolutions than flash converters containing a similar number of comparators. This comes at the price of increasing the total conversion time from one cycle to p cycles. 
   Subranging       The subranging architecture is basically a combination of the flash and the successive approximation architectures. It breaks an n-bit conversion into m sub-conversions. Like the pipelined architecture, it consists of several cascaded stages, each of which includes a low-resolution analog-to-digital converter (ADC) to achieve a coarse estimation of the input, an accurate digital-to-analog converter (DAC) to convert the output of the ADC into an analog version of the estimation, a subtractor to get the residue (the difference between the actual output and its estimation), and a gain block to amplify and to restore the residue to an appropriate level for further estimation by the next stage.  Basically, a subranging converter is similar to a pipelined converter, but without the sample-and-hold circuit. 
   SAR       The successive-approximations register (SAR) architecture can be thought of as being at the other end of the spectrum from the flash architecture. While a flash converter uses many comparators to convert in a single cycle, a SAR converter conceptually uses a single comparator over many cycles to make its conversion. 
   Sigma-Delta       The Sigma-Delta ADC architecture takes a fundamentally different approach from other chip architectures. In its most basic form, a sigma-delta converter consists of an integrator, a comparator, and a single-bit DAC. The output of the DAC is subtracted from the input signal. The resulting signal is then integrated, and the integrator output voltage is converted to a single-bit digital output (1 or 0) by the comparator. The resulting bit becomes the input to the DAC, and the DACs output is subtracted from the ADC input signal, etc. This closed-loop process is carried out at a very high "over sampled" rate. The digital data coming from the ADC is a-stream of ones and zeros, and the value of the signal is proportional to the density of digital ones coming from the comparator. This bit stream data is then digitally filtered and decimated to result in a binary-format output. 
   Other       Other unlisted, proprietary or specialized converters. 
   Search Logic:      All products with ANY of the selected attributes will be returned as matches. Leaving all boxes unchecked will not limit the search criteria for this question; products with all attribute options will be returned as matches.
   Interface Type       
   Your choices are...         
   Serial       The output interface is a general serial port. 
   Parallel       The output interface is a general parallel port. 
   SPI       The output interface is a serial peripheral interface (SPI) port. SPI was developed by Motorola. 
   I2C       Inter-Integrated Circuit (I2C) bus is a two-wire, low-to-medium speed, communication bus developed by Philips Semiconductors in the early 1980's. 
   Microwire       MICROWIRETM is a serial protocol created by National Instruments. 
   Other       Other unlisted, specialized, or proprietary interface type. 
   Search Logic:      All products with ANY of the selected attributes will be returned as matches. Leaving all boxes unchecked will not limit the search criteria for this question; products with all attribute options will be returned as matches.
   Input Type       
   Your choices are...         
   Single-Ended       Single-ended terminals carry power in one wire and the other wire is grounded. 
   Differential       Differential terminals carry power in both wires. 
   Other       Other unlisted or specialized input types. 
   Search Logic:      All products with ANY of the selected attributes will be returned as matches. Leaving all boxes unchecked will not limit the search criteria for this question; products with all attribute options will be returned as matches.
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Packaging Characteristics
   IC Package Type       
   Your choices are...         
   PBGA       Plastic ball-grid array (PBGA) is the general terminology for the BGA package adopting plastic (epoxy molding compound) as the encapsulation. According to JEDEC standard, PBGA refers to an overall thickness of over 1.7mm. 
   TBGA       Tape ball-grid array (TBGA) uses a fine, polyimide substrate and provides good thermal performance with high pin counts. 
   CSP       Chip scale package or chip size package (CSP) has an area that is no more than 20% larger than the built-in die. CSP is compact for second level packaging efficiency and encapsulated for second level reliability. CSP is superior to both direct-chip-attach (DCA) and chip-on-board (COB) technologies. CSP is used in a variety of integrated circuits (IC), including radio frequency ICs (RFIC), memory ICs, and communication ICs.   
   UCSP       Ultra chip scale package (UCSP). 
   FLGA       Fine-pitch land-grid array (FLGA) is extremely compact and lightweight, making it suitable for miniature disc drives and digital cameras. 
   QFP       Quad flat packages (QFP) contain a large number of fine, flexible, gull wing-shaped leads. Lead width can be as small as 0.16 mm. Lead pitch is 0.4 mm. QFPs provide good second-level reliability and are used in processors, controllers, ASICs, DSPs, gate arrays, logic, memory ICs, PC chipsets, and other applications.  
   LFQP       Low quad flat package (LFQP). 
   TQFP       Thin quad flat package (TQFP). 
   SOP       Small outline package (SOP). 
   SOIC       Small outline integrated circuit (SOIC). 
   TSOP Type I       Thin small outline package (TSOP), Type I is a DRAM package that uses gull wing shaped leads on both sides. TSOP DRAM mounts directly on the surface of the printed circuit board. The advantage of the TSOP package is that it is one-third the thickness of an SOJ package. TSOP components are commonly used in small outline DIMM and credit card memory applications. 
   TSOP Type II       Thin small outline package (TSOP), Type II is DRAM package that uses gull wing-shaped leads on both sides. TSOP DRAM mounts directly on the surface of the printed circuit board. The advantage of the TSOP package is that it is one-third the thickness of an SOJ package. TSOP components are commonly used in small outline DIMM and credit card memory applications. 
   SSOP       Shrink small outline package (SSOP). 
   TSSOP       Thin shrink small outline L-leaded package (TSSOP). 
   VSSOP       Very thin shrink small outline package (VSSOP). 
   TVSOP       Thin very small outline package (TVSOP). 
   SOJ       Small outline J-lead (SOJ) is a common form of surface-mount DRAM packaging. It is a rectangular package with J-shaped leads on the two long sides of the device. 
   HSOF       Small outline flat-leaded package with heat sink (HSOF). 
   PLCC       Plastic leaded chip carrier (PLCC). 
   LCCC       Leadless ceramic chip carrier (LCCC). 
   DIP       Dual in-line package (DIP) is a type of DRAM component packaging. DIPs can be installed either in sockets or permanently soldered into holes extending into the surface of the printed circuit board. 
   CDIP       Ceramic dual in-line package (CDIP) consists of two pieces of dry-pressed ceramic surrounding a "DIP-formed" lead frame. The ceramic / LF / ceramic system is held together hermetically by frit glass reflowed at temperatures between 400° - 460° centigrade. 
   PDIP       Plastic dual in-line package (PDIP) is widely used for low cost, hand-insertion applications including consumer products, automotive devices, logic, memory ICs, micro-controllers, logic and power ICs, video controllers, commercial electronics, and telecommunications. 
   SIP       Single in-line package (SIP). 
   SDIP       Shrink dual in-line package (SDIP). 
   SZIP       Shrink zigzag in-line package (SZIP). 
   Other       Other unlisted, specialized, or proprietary packages. 
   Search Logic:      All products with ANY of the selected attributes will be returned as matches. Leaving all boxes unchecked will not limit the search criteria for this question; products with all attribute options will be returned as matches.
   Production Status       
   Your choices are...         
   Full Production       Devices are currently being manufactured. 
   Discontinued       Devices are no longer available from the manufacturer, but may still be found in the supply chain. 
   In Development       Devices are in development and not yet available. 
   New Product       Devices are new products that have been announced by the manufacturer.  
   Other       Other, unlisted production status. 
   Search Logic:      All products with ANY of the selected attributes will be returned as matches. Leaving all boxes unchecked will not limit the search criteria for this question; products with all attribute options will be returned as matches.
   Screening Level       
   Your choices are...         
   Commercial       Devices support a temperature range and feature mechanical and electrical specifications that are suitable for commercial applications. 
   Industrial       Devices support a temperature range and feature mechanical and electrical specifications that are suitable for industrial applications. 
   Military       Devices support a temperature range and feature mechanical and electrical specifications that are suitable for military applications. 
   Other       Other unlisted screening levels. 
   Search Logic:      All products with ANY of the selected attributes will be returned as matches. Leaving all boxes unchecked will not limit the search criteria for this question; products with all attribute options will be returned as matches.
   Packing Method       
   Your choices are...         
   Tape Reel       Components are packed in tape reel assemblies that include a carrier tape with embossed cavities for storing individual components. A cover tape seals the carrier tape in place. This composite tape is then wound on a reel that is placed in a corrugated shipping box for transport and delivery. Customers unpack the reels and load them into industry-standard, pick-and-place board assembly equipment. Tape and reel assemblies provide component isolation and are designed for surface mount packages such as quad flat package (QFP) and thin quad flat package (TQFP).   Carrier tape is typically made from a polystyrene (PS) or PS-laminate film with a uniform film thickness between 0.2 mm-to-0.4 mm. Carrier tape design is defined largely by component length, width, and thickness. Cover tape is made from a polyethylene teraphthalate (PET) film or film laminate with an adhesive applied to the underside of the film. This adhesive is usually heat and pressure sensitive to ensure a positive, consistent seal between the carrier tape and the cover tape. The reels that contain the composite tape are typically made of polystyrene and have one, two, or three parts. Reel dimensions meet EIA-481-1, EIA-481-2, and EIA-481-3 standards. 
   Tray / Rail       Components are packed in trays (rails) that are made of carbon-powder or fiber materials and molded into rectangular outlines that contain matrices of uniformly spaced pockets. These containers protect components during shipping and provide proper component location and orientation for use with industry-standard, pick-and-place board assembly equipment. Trays are designed for components for that have leads on four sides and that require component lead isolation during shipping, handling, or processing. For example, quad flat package (QFP) and thin quad flat package (TQFP) components are often shipped in trays. To facilitate shipping and handling, trays are stacked and bound together in standard configurations. To provide rigidity, an empty cover tray is added to the top of the load. Typical stacking configurations consist of five full trays and one cover tray, and ten full trays and one cover tray. Customer requirements determine whether trays are shipped in single or multiple stacks. 
   Shipping Tube / Stick Magazine       Components are packed in shipping tubes or stick magazines that are made of rigid polyvinylchloride (PVC) and extruded in industry-standard sizes. These containers protect components during shipping and provide proper component location and orientation for use with industry-standard, pick-and-place board assembly equipment.  To facilitate shipping and handling, shipping tubes and stick magazines are usually loaded into intermediate containers such as boxes or bags to form standard quantities. Intermediate-level packing quantities for shipping tubes and stick magazines often vary by pin count and package type. 
   Bulk Pack       Components are distributed as individual parts. 
   Other       Other unlisted, specialized or proprietary packing methods. 
   Search Logic:      All products with ANY of the selected attributes will be returned as matches. Leaving all boxes unchecked will not limit the search criteria for this question; products with all attribute options will be returned as matches.
   Pin Count       The number of pins in the package. 
   Search Logic:      User may specify either, both, or neither of the "At Least" and "No More Than" values. Products returned as matches will meet all specified criteria.
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Performance
   Resolution       When an analog signal is digitized, it is represented by a finite number of discrete voltage levels. The resolution is the number of discrete levels that are used to represent the signal. To more accurately replicate the analog signal, the resolution must be increased. Resolution is usually defined in bits. Using converters with higher resolutions will reduce the quantization error. 
   Search Logic:      All matching products will have a value greater than or equal to the specified value.
   DNL       The differential nonlinearity (DNL) error is defined as the difference between the ideal and the measured code transitions for successive codes for an ADC or the difference between the ideal and the measured output value between successive DAC codes. 
   Search Logic:      All matching products will have a value less than or equal to the specified value.
   INL       The integer nonlinearity (INL) is the amount of deviation of the measured transfer function of an analog-to-digital converter (ADC) or a digital-to-analog converter (DAC) from the ideal transfer function (defined as a straight line drawn from zero to full scale). This error is sometimes referred to as static linearity or absolute linearity. 
   Search Logic:      All matching products will have a value less than or equal to the specified value.
   Power Dissipation       The maximum power in watts dissipated by the device. 
   Search Logic:      All matching products will have a value less than or equal to the specified value.
   Sample Rate       The rate at which a converter acquires the input signal, digitizes it, and outputs data to the DSP. It is specified in samples per second or Hertz (Hz) and is also referred to as the "throughput rate." 
   Search Logic:      All matching products will have a value greater than or equal to the specified value.
   SNR       Signal-to-noise ratio (SNR) is the RMS value of the sine wave fIN (input sine wave for an ADC, reconstructed output sine wave for a DAC) to the RMS value of the noise of the converter from DC to Nyquist frequency, excluding noise at DC and harmonic distortion content. It is typically expressed in decibels. 
   Search Logic:      All matching products will have a value greater than or equal to the specified value.
   SINAD       Signal-to-noise and distortion ratio (SINAD) is the RMS value of the sine wave fIN (input sine wave for an ADC, reconstructed output sine wave for a DAC) to the RMS value of the noise of the converter from DC to the Nyquist frequency, including harmonic content. It is typically expressed in decibels. 
   Search Logic:      All matching products will have a value greater than or equal to the specified value.
   SFDR       Spurious Free Dynamic Range (SFDR) is defined as the distance in dB from the fundamental amplitude to the peak spurious component in the output frequency spectrum. The peak spur can be either harmonic or non-harmonic in nature. 
   Search Logic:      All matching products will have a value greater than or equal to the specified value.
   Input Voltage Range (Vpp)       The needed input voltage (range) needed to operate the device. 
   Search Logic:      User may specify either, both, or neither of the limits in a "From - To" range; when both are specified, matching products will cover entire range. Products returned as matches will meet all specified criteria.
   Operating Temperature:       This is the full-required range of ambient operating temperature. 
   Search Logic:      User may specify either, both, or neither of the limits in a "From - To" range; when both are specified, matching products will cover entire range. Products returned as matches will meet all specified criteria.
   Reference Access       
   Your choices are...         
   Internal       The voltage reference is an internal power supply. 
   External       The voltage reference is supplied by the user. 
   Other       Other unlisted or proprietary reference access method. 
   Search Logic:      All products with ANY of the selected attributes will be returned as matches. Leaving all boxes unchecked will not limit the search criteria for this question; products with all attribute options will be returned as matches.
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Features
   Single Supply       The chip can operate with only one supply. 
   Search Logic:      "Required" and "Must Not Have" criteria limit returned matches as specified. Products with optional attributes will be returned for either choice.
   On-Chip ESD Protection       The chip has embedded radiation protection. 
   Search Logic:      "Required" and "Must Not Have" criteria limit returned matches as specified. Products with optional attributes will be returned for either choice.
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