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Supplier: Susumu Co., Ltd.
Description: ACTIVE DELAY LINE, PDSO16
- Delay Line Type: Other
- Package Type: Surface Mount Technology (SMT), Other
Supplier: Rhombus Industries, Inc.
Description: ACTIVE DELAY LINE, DIP14
- Delay Line Type: Other
Supplier: ON Semiconductor L.L.C.
Description: ACTIVE DELAY LINE, COMPLEMENTARY OUTPUT, PQCC28
- Delay Line Technology: Digital
- Package Type: Surface Mount Technology (SMT)
Description: consistent, superior TDI performance. 2048 Active Pixels Per Line 96 TDI Lines 13µm x 13µm Pixels 4 High Speed Output Ports TDI Stages Selectable Between 96, 64, 48, 32, or 24 100 MHz Data Rate with 4 Outputs Operating at 25 MHz 42 kHz Line Rate
- Array Type: Other
- High Speed: Yes
- Other: Yes
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Parts by Number for Active Delay Line Top
|Part #||Distributor||Manufacturer||Product Category||Description|
|7275466||RS Components, Ltd.||Micrel Inc||Delay Line||Category:Active Programmable Delay Line; Number of Independent Delay Inputs:1; Typical Operating Supply Voltage:-3.3, 3.3, -5, 5V; Delay to First Tap:2.2ns; Absolute Increment:0.01ns; Supplier Package:TQFP; Pin Count:32; Maximum Delay Time:12.2ns; Maximum Operating Temperature:85C; Minimum|
|7275576||RS Components, Ltd.||Micrel Inc||Delay Line||Category:Active Programmable Delay Line; Number of Independent Delay Inputs:1; Typical Operating Supply Voltage:2.5, 3.3V; Delay to First Tap:3.2ns; Absolute Increment:0.01ns; Supplier Package:TQFP; Pin Count:32; Minimum Operating Supply Voltage:2.375V; Mounting:Surface Mount; Minimum Operating|
|7275330||RS Components, Ltd.||Micrel Inc||Delay Line||Category:Active Programmable Delay Line; Number of Independent Delay Inputs:1; Typical Operating Supply Voltage:2.5, 3.3V; Delay to First Tap:3.2ns; Absolute Increment:0.01ns; Supplier Package:MLF; Pin Count:32; Product Height:0.84mm; Maximum Operating Supply Voltage:3.6V; Minimum Operating Supply|
|7327273||RS Components, Ltd.||Maxim Integrated Products||Delay Line||Category:Active Programmable Delay Line; Number of Independent Delay Inputs:1; Typical Operating Supply Voltage:5V; Delay to First Tap:16.5ns; Absolute Increment:1ns; Supplier Package:SOIC W; Pin Count:16; Mounting:Surface Mount; Product Width:7.6mm; Product Length:10.5mm|
|EP8703||ASAP Semiconductor||PCA||Not Provided||14 PIN DIP HIGH SPEED ACTIVE DELAY LINE|
|SY100EP195VTI||PLC Radwell||Micrel Semiconducter||Not Provided||DELAY LINE IC; DELAY LINE TYPE:ACTIVE PROGRAMMABLE|
Conduct Research Top
Adjust mis-matched delay lines in Cypress Semiconductor Application Note
with Injected Noise. the required set-up time prior to the active transition on the. CLOCK input, the delay of FF-1 (Figure 4) may increase or it. Figure 4. Typical Logic Path Delay Limited by Minimum Clock Period. may refuse to store the expected data. If the path length to. FF-2 is running near its
Biogen's LSM Plant; On Line, On Time, On Budget
facility for making the drug but backed down. "Companies need an active pipeline and robust capital structure to assume that level of risk,"explains Ward. "In the future,
Optima-Series Latch Input Examples (.pdf)
display format. DP0. Define X position as 0. xspeed=20000. set variable. SPX=xspeed. set X speed. #SCAN Label. CN,,1 Configure. Latch. input for Active Hi. ALX Arm. Latch. PA100000. Set profiled move. BGX. Begin X-axis motion. 2. Galil Motion Control, Inc. · 3750 Atherton Road · Rocklin, CA 95765 USA
PIC18F2520 MCP3909 3-Phase Energy Meter Reference Design - Meter Test Results and Adapting the Meter Design for other Requirements
) - 2.5 seconds (Note 1) process we use during demo board production is not DELAY (5A, 220V, PF = 0.5L) - 2.5 seconds (Note 1) true energy calibration equipment, and any testing will OFFSET for active power reflect this. (0.005A, 220V, PF = 1) - 2.5 2.5 seconds (Note 1) The results shown here were
Use of the SSP Module in the IIC Multi-Master Environment
The Inter-IC (I 2 C) bus is a two-wire serial interface developed by Philips/Signetics. The specification supports data transmission up to 400 Kbps. The I 2 C interface employs a comprehensive protocol to ensure reliable transmission and reception of data. When the bus is active, one device
Digital Signal Processing - Design Guide
; the good news is that the phase response remains linear as a function of frequency. In applications where linear phase is critical and long phase delay cannot be tolerated, a linear active Bessel or a constant delay filter may be a better selection. Two very different design techniques are commonly
Evaluation of Plasma Facing Components Thermal Performance by Infrared Thermography (.pdf)
is required at the end of manufacturing in order to detect and quantify potential imperfections and consequently to guarantee an efficient cooling. Within this framework, an active infrared thermography test bed named SATIR (French acronym for Station d'Acquisition et de Traitement InfraRouge) has
SP720, SP721 and SP723 Turn-On and Turn-Off Characteristics (.pdf)
that were subject to substantially more severe conditions than normal Human Body Model stress. The primary ESD protection requirement of the SCR structure is to absorb and divert energy away from the signal interface of sensitive circuits. Shown in Figure 1, each active input has a pair of SCRs to provide
Engineering Web Search: Active Delay Line Top
Digital Audio Interface - Lip Sync Delay IC - TPA5050 -...
(ACTIVE) Stereo Digital Audio Delay Processor With I2C Control
noticed that Windows has a significant delay between the end of transmission and the control of the RTS line, so this mode does not work properly
IÂ²C - Wikipedia, the free encyclopedia
IÂ²C uses only two bidirectional open-drain lines, Serial Data Line (SDA) and Serial Clock (SCL), pulled up with resistors.
Low-pass filter - Wikipedia, the free encyclopedia
4.2 Active electronic realization 4.3 Discrete-time realization
: Bad color Rev 1; 11/03 10-Tap Silicon Delay Line DS1110 General Description Features The DS1110 delay line is an improved replacement for ???
The Software-RAID HOWTO: Detecting, querying and testing
md5 : active raid1 sdb5[1 sda5[0 4200896 blocks [2/2 [UU md6 : active raid1 sdb6[1 sda6[0 2104384 blocks [2/2 [UU md7 : active raid1 sdb7[1
High-Speed Board Layout Guidelines
Transmission line propagation delay is a function of the dielectric constant of the material.
Quartus II Scripting Reference Manual
. . . . . . . . . . . . . . . . . . . . 1?1 Quartus II Software Command-Line Operation Support . . . . . . . . . . . . . . . . . . . . . . . . . . .