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Wide Lock-Range, Low Phase-Noise PLL using Interpolative Ring-VCO with Coarse Frequency Tuning and Frequency Linearization
By using a CMOS logic -based low-speed ring counter and a pseudo-differential logic-based high-speed ÷4/5 divider (see Fig. 8 (a)), power consumption with our frequency divider is lower than it would be with a frequency divider that was...
AL440LX | Datasheets.org.uk
...F reduced usage Interrupt controller based 82C59 Support interrupts Programmable edge/level sensitivity Power management logic Sleep/resume logic Support wake-on-modem through Ring Indicator input Real-Time Clock byte battery-backed CMOS SRAM Includes date alarm 16-bit counters /timers based 82C54 .
FJ440ZX | Datasheets.org.uk
...distributed protocols Fast type-F reduced usage Interrupt controller based 82C59 Support interrupts Programmable edge/level sensitivity Power management logic Sleep/resume logic Support Wake Ring Wake technology Support ACPI... ...256-byte battery-backed CMOS SRAM Date alarm 16-bit counters /timers based 82C54 .
CN430TX | Datasheets.org.uk
...usage Interrupt controller based 82C59 Support interrupts Programmable edge/level sensitivity Power management logic Sleep/resume logic Supports thermal alarm Support Wake Modem through Ring Indicate input Support Wake... ...Clock byte battery-backed CMOS SRAM Includes date alarm 16-bit counters /timers based 82C54 .
LT430TX | Datasheets.org.uk
Power management logic Sleep/resume logic Supports thermal alarm Support Wake Modem through Ring Indicate input Support Wake through input Real-Time Clock byte battery-backed CMOS SRAM Includes date alarm 16-bit counters /timers based 82C54 .
An efficient timing simulation approach for CMOS digital circuits
The proposed approach to fast timing simulation was tested with a number of CMOS logic circuits including a 24- stage inverter chain, a 5-stage ring oscillator, an 8-bit full adder, a 3-bit up/down counter and an 8-bit ALU...
MU440EX | Datasheets.org.uk
...with three PC/PCI channels distributed protocols Interrupt controller based 82C59 Support interrupts Programmable edge/level sensitivity Power management logic Sleep/resume logic Support Wake Ring , Wake technology, Wake power... ...256-byte battery-backed CMOS SRAM Includes date alarm 16-bit counters /timers based 82C54 .
Base drive-primitive motivation Transformer-successful evangelist Pulse delay-cardiac arrest Johnson counter -Howard’s cafeteria Current mode logic -contemporary fad in mathematics Phase... ...Baud rates-hooker’s fee schedule CMOS -underwater vegetation Meter movement... ...Bonding wire-cheap wedding ring Battery charger-prosecutor in...
Practical Computing on the Cell Broadband Engine
...line clipping, 296 clock PS3, 106 clock-cycles printing optimization, 305 clock gettime, 32 CLOCK PROCESS CPUTIME, 32 clockwise token ring EIB, 62 CMOS combinational logic , 439 CMOS power estimation, 437 Cohen... ...partitioning, 203 COTS, 12 counter -clockwise token ring EIB, 62 .
Digital Electronics: Principles Devices and Applications - Chapter Index
...logic analyser 695, 696 Character codes, see Alphanumeric codes Characteristic equations 377 Characteristic parameters of logic families, see Logic families-characteristic parameters Characteristic... ...21 Circulating register, see Ring counter CISC 528, 531, 541... ...380–1 CML, see ECL CMOS AND gate 154, 155...
Trade-Offs in Analog Circuit Design
...signal reconstruction 653–62 speed 631–62 systematic design 591–610 DDD see determinant decision programs dead-zone 827–9, 832–4 decade ring counters 1031 decoders 603, 605–6... ...design methodology circuits 1–6 CMOS mixers 787–817 CMOS VLSI... ...dominant poles 263–5 domino- logic phase frequency detectors 831–42...
Digital Logic Testing and Simulation 2nd Edition
...397–398 Combinational feedback loop 417 Combinatorial explosion 127, 165, 522, 599 Common ambiguity 73 Commutative linear algebra 457 Commutative ring 456 Compiled code 570... ...Complementary Metal Oxide Semiconductor ( CMOS ) 38–39, 124, 338–339, 551... ...path 640 Computation tree logic (CTL) 640–646 parsing the... ...of ownership 319 Cost to test a memory chip 521 Cost/bene�?t analysis 483 Counter , generic model 594...
A universal method for designing low-power carbon nanotube FET-based multiple-valued logic circuits
...a low power family of three-valued logic circuits’, IEEE J. Solid-State Circuits, 1985, 20, (2), pp. 609–616 28 Thoidis, I., Soudris, D., Karafyllidis, I., Christoforidis, S., Thanailakis, A.: ‘Quaternary voltage-mode CMOS circuits for multiple- valued logic ’, IEE Proc. Circuits Devices Syst., 1998, 145, (2), pp. 71–77 29 Wang, P., Liu, Y., Yang, M., Almaini, A.E.A.: ‘Five-valued circuit quantitative theory and design of five-valued twisted- ring counter ’.
Integrated circuition implantation high-performance CMOS/SOS inverter- ring oscillator and 1/8 static binary counter using gradually doped source - drain extension CMOS /SOS structure. Chen,M.-L., + ,EDL Oct 83312-314 high-speed logic at 300K with self-aligned ion-implanted...
Algorithmic time-to-digital converter
Although this work was demonstrated with a 0.35μm CMOS process, the design should be readily realisable with deep submicron technologies, as the circuit consists merely of a frequency switched ring oscillator and standard CMOS logic gates. Most of the circuit area and power will be taken by the counters and the post-processing...