Deterministic Jitter

Description: for electrical and optical signals. The DCA-J can accurately separate jitter into its subcomponents such as random jitter, deterministic jitter, data dependent jitter, periodic jitter, inter-symbol interference and duty cycle distortion, at rates from 50 Mb/s to 40 Gb/s and higher, all with the touch

Description: 8 Input and 8 Output Signal Conditioning Buffer Up to 4.25 Gbps Operation 30 ps of Deterministic Jitter Selectable Transmit Pre-Emphasis Per Lane Selectable Receive Equalization Available Packaging 64 Pin QFP Propagation Delay Times: 400 ps Typical Inputs Electrically Compatible

• Technology: LVDS, CML
• RoHS Compliant: Yes
• Supply Voltage: 3.3 V
• IC Package Type: Other

Description: signal integrity performance. The SN65LVCP402 is characterized for operation from -40°C to 85°C. Features Up to 4.25 Gbps Operation Non-blocking Architecture Allows Each Output to be Connected to Any Input 30 ps of Deterministic Jitter Selectable Transmit Pre-Emphasis Per Lane

• Configuration: Other
• Applications: Communications
• Package Type: Other
• On-Chip ESD Protection: Yes

Description: of Two-Serial Port Selectable Loopback Typical Power Consumption 650 mW 30-ps Deterministic Jitter On-Chip 100- Receiver and Driver Differential Termination Resistors Eliminate External Components and Reflection from Stubs 3.3-V Nominal Power Supply 48-Terminal QFN (Quad Flatpack) 7mm

• Applications: Communications
• Package Type: Other
• Single Supply: Yes
• On-Chip ESD Protection: Yes

Description: Jitter, Noise, BER, and Serial Data Link Analysis Measures and Separates Deterministic Data-dependent Jitter from Random Jitter Measures Vertical Noise, Separating Deterministic Data-dependent Noise from Random Noise Highly Accurate BER and Eye Contour Estimation, Support for DDPWS FFE

• Host Interface: Serial Port, USB, Ethernet, GPIB / IEEE-488 / HPIB, Parallel Port
• Features: Integral Display

Description: isolation of the synchronous time-critical dataflows from other asynchronous Ethernet dataflows. By implementing this standard in network devices (network switches and network interface cards), Ethernet becomes a deterministic network which can be shared by low-latency, low-jitter, and non-time-critical

Description: Jitter, Noise, BER, and Serial Data Link Analysis Measures and Separates Deterministic Data-dependent Jitter from Random Jitter Measures Vertical Noise, Separating Deterministic Data-dependent Noise from Random Noise Highly Accurate BER and Eye Contour Estimation, Support for DDPWS FFE

• Host Interface: Serial Port, USB, Ethernet, GPIB / IEEE-488 / HPIB, Parallel Port
• Features: Integral Display

Description: Features 1.6GHz Repetition Rate Programmable Patterns Programmable Differential Output Built-in Jitter Insertion Option Spread Spectrum Clocking 1 or 2 Output Channels Applications Serial data testing Clock signal generation Pulse semiconductor testing General purpose pulse

• Device Type: Generator
• Form Factor: Portable / Benchtop
• Generator Type: Pulse
• User Interface: Front Panel and Display

Description: cards and Route Processor Modules (RPMs). The Force10 E-Series E1200 provides 56.25 Gigabits per second per slot and delivers predictable line-rate performance with any combination of features enabled, deterministic low latency and jitter, robust L2/L3 functionality, and the resiliency to thwart

• Network Equipment Type: Router

Description: filter wheel for neutral density and spectral filtering applications. Plug & Play Interfaces – Gigabit Ethernet or Camera Link™ transmit commands and full dynamic digital video. Built-in IRIG-B Timing Option – Provides on-board deterministic time-stamping of each frame

• Detector Type: Array
• Cooling: Other
• Computer Host: PC
• Analog Video Output: Yes