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  • Error Correction Code in SoC FPGA-Based
    This paper examines the potential sources and implications of soft errors and a. method implemented by Altera Corporation and Micron Technology to make. embedded systems more resilient to these types of soft errors through error detection. and correction.
  • Error Correction Code in SoC FPGA-Based Memory Systems
    This paper examines the potential sources and implications of soft errors and a. method implemented by Altera Corporation and Micron Technology to make. embedded systems more resilient to these types of soft errors through error detection. and correction.
  • Minimizing Error
    pharma labeling and information publishing is a bit like running a miniature publishing business. The potential for error is high. As technology has become more readily available to help pharmaceutical companies with this task, more drug companies are automating portions of the process to ensure quality
  • Parity
    Parity is an error-detection method for computers. As data moves through a computer (e.g. from the CPU to the main memory), the possibility of errors can occur, particularly in older 386 and 486 machines. Parity error detection was developed to notify the user of any data errors. By adding a single
  • Cyclic Redundancy Code (CRC)
    and subtraction are equivalent in Modulo 2Most of the popular communication protocols, like (R) arithmetic., SDLC, HDLC and Ethernet, employCAN, USB, IrDA CRC for error detection. Now, M + R = GQ, where the checksum is embedded Normally, for the error detection in digital into the message (M + R). Here
  • A CAN Physical Layer Discussion
    (LLC) manages the overload control and notification, message filtering and recovery management functions. The Medium Access Control (MAC) performs the data encapsulation/decapsulation, error detection and control, bit stuffing/destuffing and the serialization and deserialization functions.
  • [Chapter 10] 10.7 Debugging<
    errors. But even with good error detection, it is often difficult to isolate the problem. The techniques for discovering the source of the problem are a modest few and are fairly obvious. Unfortunately, most awk implementations come with no debugging tools or extensions. There are two classes of problems
  • EETimes.com | Electronics Industry News for EEs & Engineering Managers
    surfaced and announced plans to expand what could be considered an unusual business model for semiconductors: the "fabless silicon foundry " service model. Equipment refines soft-error detection in chips The detection of soft errors in silicon chips is attracting attention on several fronts

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  • Cognitive Informatics in Health and Biomedicine
    Strategies to eradicate error pro- posed by the medical community failed to appreciate that error detection and recovery are integral to the function of complex cognitive workflow.
  • New Methods of Concurrent Checking
    Contrary to permanent faults, transient faults cannot be detected by testing but rather only by concurrent checking, and the design of effective error detection cir- cuits for concurrent checking will be a challenging problem in the next years.
  • http://dspace.mit.edu/bitstream/handle/1721.1/3322/P-2188-28936151.pdf?sequence=1
    The first section of the thesis focuses on error detection protocols; the second section examines data retransmission schemes.
  • http://www.intel.com/content/dam/doc/datasheet/7500-chipset-datasheet.pdf
    � 3 IOH Error Registers Overview.................................................................215 16.4.4 Error Logging Summary.........................................................................223 16.5 Intel QuickPath Interconnect Interface RAS .........................................................227 16.5.1 Link Level CRC and Retry.......................................................................227 16.5.2 Intel QuickPath Interconnect Error Detection , Logging, and Reporting..........228 �
  • http://www-cs.intel.com/content/dam/doc/datasheet/e7520-memory-controller-hub-datasheet.pdf
    EXP_UNCERRDMSK � PCI Express Uncorrectable Error Detect Mask (D2:F0).........................................................................................
  • http://www-cs.intel.com/content/dam/doc/datasheet/e7320-memory-controller-hub-datasheet.pdf
    � F0).................................160 3.7.72 EXP_MASKERR � PCI Express Mask Error (D2:F0)........................................162 3.7.73 EXP_ERRDOCMD � PCI Express Error Do Command Register (D2:F0) ................................................................................................163 3.7.74 EXP_UNCERRDMSK � PCI Express Uncorrectable Error Detect Mask (D2:F0) .........................................................................................165 �
  • Fault Analysis in Cryptography
    Section5.4 focuses on possibilities of using error detection codes to protect AES implementations.
  • Soft Errors in Modern Electronic Systems
    Soft-error mitigation approaches at hardware level including: error detecting and correcting codes, hardened cells, self-checking circuits, double sampling approaches, instruction-level retry. l .