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  • Technical Article: Silicon Nitride Film Stress (.pdf)
    LPCVD Silicon Nitride is a deposition that coats all of the exposed areas of the wafer. The difference difference in mechanical properties between nitride and the silicon wafer will introduce a "stress" in the wafer+nitride system... company sheet 2.ai
  • MICRO: Technical Programs
    of Advanced Industrial Science and Technology Progress and Challenges in PFC Reductions at AMD PFC Emissions from a 200 mm Fab at the 90 nm Technology Node In situ Cleaning of LPCVD Furnaces Using a Thermal NF Control of PFC Emissions from Plasma Processes by Reactive Gas Addition Advances
  • Evaluating the use of hard-mask films during bulk silicon etching
    to be protected during the etching process to prevent metal interconnects and bond pads from being etched. Deposition of a hard-mask film is one method of shielding frontside metallization from the corrosive etchant. Because exposure to high temperatures must be limited following metallization, LPCVD silicon
  • MICRO: Breakout
    and capacitor group. The equipment manufacturer began a program at the beginning of 2000 during talks about RTP and LPCVD equipment, Kuppurao says. "Increasingly, we were getting into gate oxide discussions with customers, all mentioning cleans being a very big
  • MICRO: Product Technology News (September 2000)
    comparable to that of pumps for 200-mm processes. They offer high pumping speeds, quiet operation, ease of control, and low cost of ownership for the difficult etch, PECVD, and LPCVD processes used in silicon wafer and flat-panel display manufacturing. Two systems added to the NSX series perform
  • Examining scale-up and computer simulation in tool design for 300-mm wafer processing
    numerical simulation is possible. One simple example relates to the multiple-wafer-in-tube low-pressure chemical vapor deposition (LPCVD) reactor. In this system, wafers are placed in a tube parallel to one another, with the wafer axis
  • MICRO: Transistorama
    poly layers and to next-generation devices is discussed briefly. Bit Line Coupling and Trench-Node Leakage During the development of doped polysilicon recipes using a vertical low-pressure chemical vapor deposition (LPCVD) furnace at Infineon Technologies ' 300-mm fab in Richmond, VA, it was observed

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