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  • Medical Device Link . Zero Downtime: Setting the Standard for Reliability with Microkernel RTOS Technology
    architectures: real-time executive, monolithic kernel, and microkernel. The major difference in the three types is how they use the memory-management unit (MMU), a component of the processor fundamental to operating system reliability. In a nutshell, the MMU manages memory paging and allocates address space
  • Motion Control - In line with real-time control
    bonus comes in the way the network processes data. Ethernet packets are no longer received then interpreted and copied as process data at every connection. The newly developed FMMU (fieldbus memory-management unit) in each I/O terminal reads data addressed to it while the message continues through
  • Power IC for Powering Marvell (R) PXA270 Processors (.pdf)
    This reference design is for powering a Marvell PXA270 processor using TI's TPS65021, a power management unit that provides three highly efficient, step-down converters targeted at providing the core voltage, peripheral, I/O and memory rails in the system.
  • EETimes.com | Electronics Industry News for EEs & Engineering Managers
    , LCDs Samsung posts record sales amid memory, LCD surge Unitive opens die-level processing plant for CSPs in U.S. IBM shows $150 million loss in IC unit, blames 300-mm fab yields Transmeta samples 90-nm processor, reports huge loss FEI transforms yield software
  • Computer Power User Article - Richard Heye
    As vice president/general manager of the Microprocessor Business Unit for AMD, Heye oversees all marketing, platform engineering, infrastructure development, and program management functions for AMD's CPG (Computation Products Group). How much of AMD is CPG and is CPG just microprocessors? AMD has
  • EETimes.com | Electronics Industry News for EEs & Engineering Managers
    requirements-management tool can help development teams crafting embedded software overcome problems mapping test specifications, unit test scenarios, test data, and code coverage verification, with high level requirements and design requirements. RISC core adds muscle to Renesas microcontroller

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