Products/Services for SerDes Vendors
Serdes - (13 companies)
Programmable Logic Devices (PLD) - (207 companies)Programmable logic devices (PLD) are designed with configurable logic and flip-flops linked together with programmable interconnect. PLDs provide specific functions, including device-to-device interfacing, data communication, signal processing, data display, timing and control operations, and almost every other function a system must perform. Search by Specification | Learn More
Network and Communication Chips - (403 companies)
Product News for SerDes Vendors
10:4 Gearbox 100G Ethernet/OTN PHY IC The Vortex Gearbox ™ AVSP-1104 is a single-chip 100Gbps gearbox PHY IC designed for high-density 100G Ethernet and Optical Transport Networking (OTN) applications. The device supports full-duplex multiplexing of ten 10/11Gbps channels and de-multiplexing of four 25/28Gbps channels. The device features Avago ’s proven 28nm CMOS SerDes technology that has demonstrated compliance with IEEE CAUI and various Common Electrical Interface (CEI) standards that include CEI-11G-SR, CEI-25G-LR... (read more)
100 Gbps Enabling Technology for our e-nouncement newsletter at www.molex.com/link/register/. OIF Interoperability 2012. Ten companies, including Altera, Gennum and Molex, will unite under the banner of the Optical Internetworking Forum to showcase multi-vendor participation in OIF Interoperability 2012 Enabling High-Speed Dynamic Services. The OIFs PLL demonstration will showcase the draft CEI-28G-VSR implementation agreement, featuring host ASICs with VSR SERDES, host PCB traces, optical module connectors, module retimers... (read more)
...that affect device interoperability in the ecosystem. SGMII and SerDes interfaces are very similar; consequently, are very easy to misuse. Ethernet Autonegotiation and manual link configuration settings also play a crucial role in establishing a valid link between two Ethernet devices for application...
...transceivers are used with a. Vitesse Semiconductor VSC8117. serializer/deserializer/clock. recovery/clock generation. integrated circuit (SerDes IC). along with a PMC-Sierra PM5355. framer and ATM cell processor. IC. ApNt1178 622.08 Mb/s OC-12 ATM-SONET/SDH. Reference Design for Multimode...
Technical innovation is required on multiple fronts to enable the industry migration from 10G to 40/100G. Recent advances in optics, SerDes and clocking technologies are helping to pave the way for this network transition. Given their direct impact on system-level performance, multi-PLL clocks...
...system-level margin to reliably meet the application jitter requirements. If this jitter. threshold is exceeded in high-speed SerDes applications, for example, it could have a detrimental impact on the. Bit-Error Rate (BER) of the associated high-speed communications link. By ensuring jitter design...
/deserializer/clock recovery/clock. generation integrated circuit (SerDes IC) along with a PMC-Sierra PM5355 framer and. ATM cell processor IC. Using the presented information, designers will be able to directly. copy the necessary portion of the circuit and layout for use on a printed circuit board...
4-Channel. Ethernet. Express. Express. RapidIO. DMA. memory architecture and whether or not the cores operate. synchronously or asynchronously. 8-Lane. 8-Lane. SerDes. SerDes. Today's embedded radar systems are equipped with modern. I/O interconnections, which improve the performance of a. Figure 1...
...and supports all of the protocol options defined for AdvancedMC. provides high-speed connectivity for the AdvancedMC modules,. modules, including Gigabit Ethernet, RapidIO, and PCI Express. giving up to eight protocol independent 12.5 Gb/s SERDES based. The MicroTCA backplane provides an I2C-based...
Engineering Web Search: SerDes Vendors
Chapter 9: High-Speed Differential I/O Interfaces with DPA in...
differential I/O support mode, this high-speed PLL clock feeds the SERDES. Arria GX devices only support one rate of data transfer per fast PLL in
See Altera Corporation Information
Serial Multiprotocol Transmission with the LatticeSC FPGA
and work continues to upgrade existing technology in the field, system vendors now have to decide how best to transmit these various protocols over
See Lattice Semiconductor Corporation Information
BCM56580 Product Brief
ports ? High level of integration and low power consumption enable system vendors to build high-performance, high-port density ? Based on StrataXGS?
See Broadcom Corporation Information
XGMII: HSTL and/or SSTL2
The market is/will require SERDES vendors designing to the PCS side of the XGMII to support both HSTL and SSTL2 in an effort to satisfy both existing