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Product Announcements
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Holtek Encoders and Decoders
Linx Technologies Digital ICs from American Microsemiconductor American Microsemiconductor, Inc. TXS4558 - Dual SIM card power supply Texas Instruments Standard Linear and Logic High Security Encrypted Remote Control Encoder ICs Linx Technologies MT Series Bi-Directional Remote Control Transcoder Linx Technologies RECOM RCD-48 Constant Current Buck LED Driver Mouser Electronics, Inc. |
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Chapter 1: Arria GX Transceiver Architecture generators: Transmitter local clock divider block Central clock divider block The transmitter local clock divider block resides in the transmit See Altera Corporation Profile & Catalog |
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Stratix II GX Device Handbook: Stratix II GX Architecture Each Stratix II GX transceiver block contains four full-duplex channels and supporting logic to transmit and receive high-speed serial data streams. See Altera Corporation Profile & Catalog |
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A Power-Efficient 5.6-GHz Process-Compensated CMOS Frequency... A Power-Efficient 5.6-GHz Process-Compensated CMOS Frequency Divider |
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Gigahertz CMOS/SIMOX circuits Pub Year: 1988 Pub Date: 1988 Meeting Dates: 3-5 Oct. 1988 Conference Title: SOS/SOI Technology Workshop, 1988. |
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AN10872 UBA2014 TL 01 -- 2011 3 21 UBA2014 UBA2014 T5 T8... 5 GND DRIVER LOGIC reset 12 ANT/CMD ACM STATE LOGIC PREHEAT TIMER 01 ? RESET STATE ? START-UP STATE -- ? PREHEAT STATE 201 LOGIC ? IGNITION STATE 1 ? See NXP Information |
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AN10872 TL application with UBA2014 UBA2014 VDD(L) Al 5 l i GND DRIVER n for LOGIC m at reset R ion ev pr 12 ANT/CMD ACM ovi . 01 -- STATE LOGIC ded PREHEAT TIMER in ? RESET STATE this See NXP Information |
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XYZ: A Motion-Enabled, Power Aware Sensor Node Platform for... |
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dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04, and... See Microchip Technology, Inc. Profile & Catalog |
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Design Techniques for Radiation-Hard Phase-Locked Loop... oscillator (VCO) with a frequency range from 2.6GHz to 3.5GHz, a 3.5GHz current mode logic (CML) divider and a phase-frequency detector (PFD). The |
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2298 Most modern FPGAs use asynchronous ROMs to synthesize the combinational logic and D-type flip-flops for implementing the memory/sequential logic. |