Packet switching chips are communication integrated circuits (ICs) used in packet-switched networks to rout packets between network nodes. They are designed for local area networks (LAN), wide area networks (WAN), or metropolitan networks (MAN); and are often used with remote access concentrators and voice over Internet protocol (VOIP) gateways. High-speed packet switching chips are also used with enterprise routers, metro access switches and routers, multi-service provisioning platforms (MSPP) and storage platforms. In some applications, a switch fabric chip is used to interconnect multiple packet switching chips and produce a non-blocking Layer 3 switch. Optional stacking software provides a way to add IP routing switches to wiring closet stacks, and may provide stacking support for Internet gateway multicast protocol (IGMP).
Typically, packet switching chips are used with Ethernet or Fast Ethernet networks. Ethernet is a LAN protocol that uses a bus or star typology and supports data transfer rates of 10 Mbps. The Ethernet specification is the basis for the IEEE 802.3 standard, which specifies the physical and lower software layers. These layers are numbered and include both Layer 3 (L3) and Layer 4 (L4). To handle simultaneous demands, Ethernet uses carrier sense multiple access / collision detection (CSMA/CD) to monitor network traffic. Fast Ethernet is a networking standard that supports data transfer rates up to 100 Mbps. There are two types of Fast Ethernet: 100Base-X and 100Base-T. 100Base-X uses two physical links, one for transmission and one for reception, between nodes. 100Base-T uses medium access control protocol (MAC). The IEEE 802.3 committee developed the standards for Fast Ethernet used by packet switching chips.
Differences in Packet Switching Chips
Packet switching chips differ in terms of product specifications such as the number and size of the Ethernet or Fast Ethernet ports, the number of subnets per chip, and available transmission control schemes. Some products use strict priority, dynamic priority, or weighted round robin (WRR). Features for packet switching chips include buffer management, IP multicasting, L3 routing, protocol filtering, port trunking, port mirroring, and enhanced quality of service (QoS) standards for packet prioritization. QoS is critical to the proper control of network services. It is also important for time-sensitive traffic such as voice and video. With some packet switching chips, incoming traffic is sorted and prioritized via QoS classifications based upon the L4 source.