RapidIO products use established scalable, packet-switched, high-performance fabric to assist equipment designers with wireless infrastructure, edge networking, storage, scientific, and military and industrial markets. RapidIO products use high-performance architectures to pass data and control information between microprocessors, digital signal processors (DSPs), communication and network processors, system memory, and peripherals within a system. Rapid IO technology is designed to for compatibility with popular integrated communications processors, host processors, and networking digital signal processors. RapidIO products also assist the high-performance embedded industry by providing increased reliability, increased bandwidth, and faster bus speeds in intra-system interconnects.
RapidIO products allow for chip-to-chip and board-on-board communications at performance levels up to 10 gigabits per second or more. RapidIO is a low-latency and memory-addressed protocol that has no impact on operating system (OS) software. This protocol is scalable, reliable, can support multi-processing, and is transparent to application software. This interconnect is designed typically for common .25 and .18 micron configuration memory operating system (CMOS) technology. RapidIO interconnects have a minimal silicon footprint for low-cost field programmable gate-array (FPBA) designs. Additional benefits of RapidIO products include bridging to other bus technology interfaces such as peripheral component interconnects (PCI), peripheral component interconnects eXtended (PCI-X), and area networks like InfiniBand. Features for RapidIO products include high data bandwidth capabilities, support for high-performance I/O devices, shared memory, message passing, and software-managed programming models.
The RapidIO specification is an open standard supported by the RapidIO Trade Association. This association directs future development and adoption of RapidIO products and systems. The RapidIO products standard has three layers: logical, transport, and physical. The logical layer of the RapidIO standard defines the overall protocol and packet formats that are necessary to initiate and complete transactions. The transport layer is the route that information follows from one end point to another. The third layer of RapidIO standards is the physical layer. This layer describes the specific interfaces of the RapidIO device level. Physical specifications for RapidIO products include packet transport mechanisms, flow control, electrical characteristics, and low-level error management. The third layer provides the flexibility of adding new transaction types to the logical specification without modifying the transport of physical layers of the rapidIO products.