DRAM and SDRAM Memory Chips Information

 

Dynamic random access memory (DRAM) chips are single-transistor memory cells that use small capacitors to store each bit of memory in an addressable format that consists of rows and columns. Because capacitors are unable tDRAM and SDRAM Memory Chips imageo hold a charge indefinitely, DRAM memory chips require a near-constant pulse of current to retain stored information. If DRAM memory chips are not refreshed, data is lost. Though less expensive than synchronous random access memory (SRAM), DRAM requires extra processing time to restore the contents of memory addresses. DRAM is used widely in personal computers and workstations. Common DRAM types include extended fast page mode (FPM) DRAM and extended operation (EO) DRAM.

  

Specifications

DRAM memory chips vary in terms of density, number of words, bits per word, internal blanks, supply voltage, and operating temperature.

  • Density is the capacity of the chip in bits.
  • The number of words equals the number of rows, each of which stores a memory word and connects to a word line for addressing purposes.
  • The bits per word are the number of columns, each of which connects to a sense / write circuit.
  • Supply voltages range from - 5 V to 5 V and include intermediate voltages such as  -4.5 V, -3.3 V, -3 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3 V, 3.3 V, and 3.6 V.
  • Some DRAM memory chips support a specific temperature range and feature mechanical and electrical specifications that are suitable for commercial or industrial applications.
  • Other DRAM memory chips meet screening levels for military specifications (MIL-SPEC). 

Selection Criteria

Selecting DRAM memory chips requires an analysis of performance specifications such as access time, refresh rate, and refresh options.

  • Measured in nanoseconds (ns), access time indicates the speed of memory and represents a cycle that beDRAM and SDRAM Memory Chips imagegins when the CPU sends a request to memory and ends when the CPU receives the data requested. 
  • The refresh rate, which is typically expressed in kilobytes (KB), describes the size of the data that must be recharged.
  • Self-refreshing DRAM memory chips include technology that refreshes the device independently of the CPU or external refresh circuitry. Self-refreshing DRAM memory chips reduce power consumption dramatically and are commonly used in notebook and laptop computers.  

Understanding DRAM memory speeds Video Credit: CrucialMemory / CC BY 3.0

  

Logic Families

Selecting DRAM memory chips requires an analysis of logic families. Transistor-transistor logic (TTL) and related technologies such as Fairchild advanced Schottky TTL (FAST) use transistors as digital switches. By contrast, emitter coupled logic (ECL) uses transistors to steer current through gates that compute logical functions. Another logic family, complementary metal-oxide semiconductor (CMOS) uses a combination of p-type and n-type metal-oxide-semiconductor field effect transistors (MOSFET) to implement logic gates and other digital circuits. Logic families for digital comparators include cross-bar switch technology (CBT), gallium arsenide (GaAs), integrated injection logic (I2L) and silicon on sapphire (SOS). Gunning with transceiver logic (GTL) and gunning with transceiver logic plus (GTLP) are also available.

 

Package Types, Pins, and Flip-Flops 

DRAM memory chips are available in a variety of IC package types and with different numbers of pins and flip-flops. Basic IC package types for DRAM memory chips include ball grid array (BGA), quad flat package (QFP), single in-line package (SIP), and dual in-line package (DIP). Many packaging variants are available. For example, BGA variants include plastic-ball grid array (PBGA) and tape-ball grid array (TBGA). QFP variants include low-profile quad flat package (LQFP) and thin quad flat package (TQFP). DIPs are available in either ceramic (CDIP) or plastic (PDIP). Other IC package types include small outline package (SOP), thin small outline package (TSOP), and shrink small outline package (SSOP). 

 

Standards

JEDEC JESD 79-4 - DDR4 SDRAM



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