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Electrically erasable programmable read-only memory (EEPROM) chips are similar to PROM devices, but require only electricity to be erased. Architecture or status, performance, power characteristics, and packaging information are all important parameters to consider when searching for EEPROM memory chips.
Architecture or status specifications that are important to consider when searching for EEPROM memory chips include density, number of words, bits per word, bus type, and production status. Density is the capacity of the memory chip expressed in bits. Number of words refers to the number of "rows" in the organization of the memory chip. Each row stores a memory word and connects to a word line (one line of the memory bus) for addressing purposes. Bits per word refer to the number of "columns" in the organization of the memory chip. Each column connects to a sense / write circuit (a bit), which connects to data input/output lines of the chip. Common choices for bus type include parallel, serial, serial-1wire, serial-2 wire, serial-3 wire, I2C, Microwire, SPI, and serial-uPort. Production status can be active, discontinued or new. Active EEPROM memory chips are available and are currently being manufactured. Discontinued EEPROM memory chips are no longer available from the manufacturer, but may still be found in the supply chain. New devices are either just hitting the market, or are soon to be, as announced by the manufacturer.
Common performance specifications for EEPROM memory chips include data rate, access time, data retention, endurance, and logic family. Data rate is the transfer speed in hertz. This is the number of bits per second that can be moved internally in the chip. Access time is a measurement of time in nanoseconds (ns) used to indicate the speed of memory. Access time is a cycle that begins the moment the CPU sends a request to memory and ends the moment the CPU receives the data it requested. Specifically, for a synchronous device it is the time, usually in ns, from a clock edge to when data is available at the output of a device. For an asynchronous device it is the time from the initiation of the read cycle to when the data output is available. Data retention is the time (in years) that the memory chip can retain the data without reloading. Endurance is the maximum number of write / read cycles that the chip can support. Common choices for logic family include L, S, H, LS, AS, ALS, FAST, HC, HCT, AHC, AHCT, FCT, AC, ACT, AQC, ABT, ABTE, ABTH, BCT, BTL, CBT, FB, GTL, GTLP, ALB, LV, LVC, LVCH, ALVC, LVT, LVTZ, ALVCH, LCX, VCX, CBTLV, CMOS (4000), ECL, and TTL.
Power Usage and Requirements
Important power characteristics specifications to consider when selecting EEPROM memory chips include supply voltage, power dissipation, operating current, and standby current. Common choices for supply voltage include –5 V, -4.5 V, -3.3 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 2.7 V, 3 V, 3.3 V, 3.6 V, and 5 V. The power dissipation is the total power consumption of the device. It is generally expressed in watts or milliwatts. The operating current is the minimum current needed for active chip operation. The standby current is the minimum current needed for the operation of the chip while is inactive. Common package information for EEPROM memory chips includes pin count, screening level, package type, package material, and operating temperature.
JEDEC JESD 22-A117 - ELECTRICALLY ERASABLE PROGRAMMABLE ROM (EEPROM) PROGRAM/ERASE ENDURANCE AND DATA RETENTION STRESS TEST
MIL-M-38510/165 - MICROCIRCUITS, MEMORY, DIGITAL, CMOS 524, 288 BIT, ELECTRICALLY ERASABLE, PROGRAMMABLE READ-ONLY MEMORY (EEPROM), MONOLITHIC SILICON
SMD 5962-87514 - MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8K X 8-BIT EEPROM, MONOLITHIC SILICON
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