QT2256-320PXI - Combination Board Tester ATE QT2256 system is designed as a Combination Board Tester. It can perform Board Level Functional test through edge connectors of a PCB, with guided probe diagnostics.
ATE QT2256-320PXI system is designed as a Combination Board Tester capable of testing highly complex and dense PCBs employing various test techniques on a single platform.
It can perform Board Level Functional Test through edge connectors of a PCB, and guided probe diagnostics utility to reliably repair Digital/Analog and Mixed Signal PCBs of various complexities for conventional PCBs.
It is an In-Circuit Device / cluster tester when High Current Pin Driver options are installed and interfaced to the UUT either through clips / probes or nail bed. Standard configuration is 64 Channels high current Pin Drivers.
It has in-built 20MHz 12bit Analog Driver / sensors synchronized with digital drivers for covering analog / mixed signal devices.
Integrated Boundary Scan Test controller (Up to 4 Chains) and software package can be used to test today's PCBs with high density / high pin count devices. Uses latest technology Boundary Scan hardware with RAM based drivers / sensors in synchronization mwith ATE digital and analog pin drivers.
To effectively test CPU based boards without excluding the CPU from the test, the system offers optional Qmax patented Bus Cycle Signature System.
In-Circuit Emulator Support for testing DSP based Board Function.
Parametric Measurement Units (PMU) enables testing of the DC parametric of device pins on the edge connector for input bias current, Fan out capacity and Tri-state leakage currents to further enhance fault coverage and avoid unwanted field returns.
Optional AC Parametric Tests for propagation delay, rise / fall time and pulse width measurements.
The capabilities can be further enhanced with optional IEEE instrumentation or PXI based Instrumentation and control through TestDirector II software.
Analog Highways and relay matrix modules are used in routing the test pin to external measurement IEEE or PXI Instruments of user choice.
The ATE is interfaced to an external Host PC using a 32 bit, 33MHz PCI interface card allowing a maximum data transfer rate of 132 Mega bytes per second.
It is a modular design with upgrade options. The basic system comes with 64 High Current Digital Channels, 64 digital channels with 50 Ohms source impedance, 8 Flying channels 2 Analog channels and 5 fixed UUT power supplies. It can be easily upgraded to 320 or more Digital Channels, 4 Analog Channels and with Programmable UUT power supplies, IEEE or PXI External Instrumentation, Bus Cycle Signature System, ICE and Integrated Boundary Scan Test.
The heart of the test system is a FPGA based highly programmable dedicated test vector processor with Digital Clock Management System. It has 4k x 60 bit RAM for Instruction Register and Test Sequencing. Up to 4096 test sequences can be pre-programmed to run automatically with options for conditional branching. This Test vector processor controls the timing and construction of Drive waveforms that will be driven into the UUT and to acquire response data. Data formatting capability for NR, RO, RZ, ZD and SBC are supported. All digital channels have 1MB X 8 RAM. All analog channels have 1MB X 24 RAM. The Four Analog Channels can be multiplexed to any of the 320 channels and 8 flying channels. The basic timing unit is programmable from 10 ns to 655us in steps of 10ns. A Test Cycle with 4 basic timing units results in 40ns data rate or 25MHz test rate. Digital highways provide for synchronization of the test cycle to UUT events and digital timing measurements through tester pins.
