MICRO: Golden (February 2001)

Josh H. Golden, J. Eric Carrubba, and Jay Jung, Optimizing dispense tool designs and SOD management will require cooperation between equipment manufacturers, materials suppliers, During the last five to eight years, the semiconductor industry, academia, and government labs have been engaged in an intense worldwide research effort in preparation for the integration of low-k dielectric materials in ICs at the 180-nm technology node, which was scheduled for first shipments in 1999. This effort was driven by the desire to uphold Moore's Law and the various revisions of the industry roadmap. However, the transition from silicon dioxide films applied by chemical vapor deposition (CVD), which have a dielectric constant (k) value of 4.1 to 4.2, to inorganic, organic, and hybrid materials with k values of less than 3.0 has proven to be more difficult than predicted. Figure 1 illustrates the delayed adoption of low-k dielectrics based on the roadmaps. As both research and delays continue, a debate has been raging over the choice of techniques for applying low-k materials. Both spin-on and CVD candidates present integration challenges because their properties differ from those of the benchmark, SiO , which is hard, relatively inert, thermally stable, and easy to deposit or grow. Table I compares the dielectric properties of SiO to those of organic spin-on dielectrics (SODs) and Si CVD films. The organic SODs may present a greater integration challenge than do the hybrid Si CVD films, which are more "silica-like." For example, SiO has a modulus of 72 GPa, while a leading polyarylene SOD exhibits a modulus of 2.7 GPa. This approximately 27-fold difference in modulus has a significant effect on the efficacy of chemical mechanical planarization (CMP) processes, which subject copper interconnect layers to significant shear forces. In addition to the modulus, heat dissipation is another important issue with low-k candidates,