Examining scale-up and computer simulation in tool design for 300-mm wafer processing

Demetre J. Economou and Theodoros L. Panagopoulos, Plans to introduce pilot lines and fabs for 300-mm wafer processing are well under way. A 300-mm wafer allows 2.4 to 2.7 times more die per wafer, and a 25—40% reduction in per-die cost. At the same time, IC technology is moving toward 0.18-, 0.15-, and 0.13-µm linewidths. The combination of these two trends places unprecedented demands on wafer processing equipment and presents enormous challenges to equipment manufacturers. Their role in the IC business involves design and development of new-generation equipment as well as development and demonstration of processes compatible with such equipment. As a result, computational modeling is called on now more than ever to play a complementary role in equipment and process design. The development of models and computer simulation codes is being pursued vigorously at universities, government laboratories, and commercial vendors. The virtual reactor concept is close to becoming a reality. The transition from 200- to 300-mm wafer processing tools presents a clear problem in scale-up. Chemical engineers have had years of experience in scaling up chemical reactors from laboratory to pilot to full-production scale. When a system is too complicated to be analyzed by direct computer simulation, semiempirical methodologies may be implemented. One such methodology involves the use of dimensionless numbers or groups that describe the system's behavior. These numbers show the relative importance of one physical phenomenon versus another and appear naturally when the governing equations that describe the conservation of momentum, energy, and mass, and their respective boundary conditions are nondimensionalized. Dimensionless groups can be used as a guide for scale-up even when direct numerical simulation is possible. One simple example relates to the multiple-wafer-in-tube low-pressure chemical vapor deposition (LPCVD) reactor. In this system, wafers are placed in a tube parallel to one another, with the wafer axis