Chapter 16.8 - Current-Fed Parallel Resonant Half-Bridge Topology

This topology is shown in Fig. 16.22. It is used when the AC input is
230 V and a power factor correction building block (Chap. 15) boosts
rectified output to a voltage higher than the highest peak of the rectified
230 VAC.

For a ±15 percent tolerance on the AC input, that peak rectified
voltage is 1.15 × 1.41 × 230 = 373 V DC. The usual power factor
correction circuit boosts that to a slightly higher 400 V, and the
resonant half bridge is needed to cope with such a high input which is
more than a current-fed push-pull can handle.

For an AC input of 120 V, for ±15 percent input tolerance, the peak
rectified input is 1.15 × 1.41 × 120 = 195 V, and the usual power factor
correction building block boosts that to about 205 V, (Sec. 16.6.2). It
was seen in that section that the off transistor in current-fed resonant
push-pull topology is subjected to π(V_dc) = π(205) = 644 V. For the 230
V AC, a current-fed push-pull circuit would subject the off transistor
to π × 400 = 1257 V DC which would require too expensive a
transistor.

It will be seen below that the current-fed parallel resonant
halfbridge topology subjects the off transistor to only (π/2)V_dc = (π/2)400
= 628 V. There are numerous inexpensive candidates for such a
transistor.

It also is self-oscillatory with windings T2A, T2B on T2 providing the
positive feedback. Here T1 is the main power transformer, and its
magnetizing inductance in shunt with C_r and the reflected ballast
capacitor C_b forms the parallel resonant tank circuit. Inductors L1 and
L2 are the constant-current drive elements for the resonant tank. The

one lamp shown is a rapid-start type driven by the secondary for
isolation.

Filament current for the lamp (or paralleled lamps, as this topology
permits driving lamps in parallel) is taken in series from the
transformer secondary and is limited by C_f and C_b. The circuit starts
oscillating when the voltage across C_s has risen above the breakdown
voltage of dyac Dy. When the dyac fires, R_s supplies current into the
base of Q₂, turning it on. Thereafter, whenever Q2 turns on, it
discharges C_s, keeping it from interfering with the normal turn-on
voltage of the half sinusoid across T2A.

Waveforms at significant points are shown in Fig. 16.14b to e. When
Q1 turns on, it produces a half sinusoid of positive voltage at V_A. When
it turns off, it produces a half sinusoid of negative voltage at V_A. The
peak-to-peak voltage across the tank (from V_A to V_B) is pV_dc, which is
p(400) = 1256 V for V_dc = 400 V. The rms voltage across the tank is V_rms
= 0.707 × 1256/2 = 444 V. Current in the primary is I_rms = V_rms/X_Lt, where
L_t is the inductance of the transformer primary.

Now L_t and C_t ( = C_r + reflected ballast capacitor C_b are calculated
as in Sec. 16.6.6 for the current-fed push-pull circuit. The number of
primary turns N_p is calculated from Faraday’s law = (Eq. 16.10) for a
tentatively selected core and as high a peak flux density B_m as
possible with still reasonably low core losses. Once N_p is selected, the
core gap is chosen from curves (as in Fig. 16.22) so that the selected N_p
yields the chosen L_t. The ballast capacitor C_b is chosen from Eqs. 16.1,
16.2, and 16.3.

Figure 16.22c, d, and e shows the maximum voltage stress across an
off transistor is (π/2)V_dc, and for V_dc = 400 V it is (π/2)V_dc = 628 V. There
are many inexpensive 700-V transistors to meet this requirement.

This topology is shown in Fig. 16.22. It is used when the AC input is
230 V and a power factor correction building block (Chap. 15) boosts
rectified output to a voltage higher than the highest peak of the rectified
230 VAC.

For a ±15 percent tolerance on the AC input, that peak rectified
voltage is 1.15 × 1.41 × 230 = 373 V DC. The usual power factor
correction circuit boosts that to a slightly higher 400 V, and the
resonant half bridge is needed to cope with such a high input which is
more than a current-fed push-pull can handle.

For an AC input of 120 V, for ±15 percent input tolerance, the peak
rectified input is 1.15 × 1.41 × 120 = 195 V, and the usual power factor
correction building block boosts that to about 205 V, (Sec. 16.6.2). It
was seen in that section that the off transistor in current-fed resonant
push-pull topology is subjected to π(V_dc) = π(205) = 644 V. For the 230
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