Medical Device Link .

Reliability Qualification Testing of Chip-Scale IC Packages Miniature PCB-mounted components that passed tests for high-reliability portable applications provide an example of component qualification for medical electronics OEMs. New medical electronic products destined for wearable or portable applications have to be small and lightweight. The challenge for the product developer competing in this very specialized field is to introduce a device that will meet all performance and functionality expectations in a form factor that is significantly smaller and lighter than the product it is replacing. The engineer designing the medical device will likely look at the newer generation of integrated circuit (IC) packages offered by commercial suppliers, many of whom can furnish a packaged device that is only slightly larger than the silicon die element. Two major considerations medical electronic equipment manufacturers must address when adapting these miniature chip-scale IC packages (CSPs) are reliability and performance. To successfully qualify an IC component package technology for medical electronic applications, the OEM must establish confidence in end-product reliability and, for some products, receive assurance of uninterrupted service. One package methodology that has been developed to miniaturize IC packages and improve their reliability in medical electronics is the micro ball-grid array (�BGA). This methodology provides a finished-component outline barely larger than the silicon die itself. The devices are furnished with either eutectic tin-lead or lead-free tin-silver-copper solder-ball contacts with a center-to-center pitch of 0.75 mm. The package is unique in that the die is mounted with its active surface facing down, providing the short electrical interface often needed to enhance performance to meet requirements. Although a �BGA package outwardly looks like any miniature BGA (see Figure 1), it is constructed as a physically compliant system of materials and die-to-package interfacing that compensates for the wide differences in coefficient of thermal expansion (CTE) between the silicon