Example 4: High-Speed Digital Design

This example demonstrates how to stack up the layers and design transmission lines for a high-speed digital PCB. The example also demonstrates how to create a moated ground area with a bridge around a high-frequency crystal oscillator, how to perform pin/gate swapping, and how to create a heat spreader using free vias to the ground plane. The example circuit is shown in Fig. 9-122.

Figure 9-122: High-speed digital circuit schematic.

The BOM for this example is shown in Table 9-11. The circuit consists of a (fictional) high-speed, low-pin-count microcontroller/digital signal processor (uP-EXD10) driven by a 66-MHz clock (X1), a digital to fiber optic interface IC (FO-TX, which mimics an ADN2530 but with fewer pins), a fiber optic laser diode (LD1), and a couple of 54ALS00 NAND gates used for I/O decoding. The digital signals have rise and fall times from 200 ps to 1.9 ns and require controlled impedance traces (see the Analog Devices ADN2530 data sheet for an example application). In a real design more bypass capacitors would be used on the circuit, but the design is scaled down to fewer than 10 parts and fewer than or equal to 14 pins per part to allow the use of the Demo version. The parts and footprints are located on the CD (in the Digital_Ex folder) included with the book.