From Silicon Labs
As clock speeds and communication channels run at ever higher frequencies, engineers who have previously had
little need to consider clock jitter and phase noise are finding that they need to increase their knowledge of these
subjects. This primer provides an overview of jitter, offers practical assistance in making jitter measurements, and
examines the role phase-locked loops (PLLs) have in this field.
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Topics of Interest
As clock speeds and communication channels run at ever higher frequencies, accurate jitter and phase noise measurements become more important, even as they become more difficult and expensive to...
Phase Locked Loop (PLL) circuits are increasingly used in microcontrollers to achieve higher internal clock frequencies. This allows better performance while reducing overall noise. Several of...
Phase Locked Loop (PLL) circuits are increasingly used in microcontrollers to achieve higher internal clock frequencies. Incorporation of PLL circuits allows better performance while reducing overall...
6.5 Noise Characteristics of Phase-Locked Loops In this section, we investigate the noise characteristics of phase-locked loops in the lock state from a system point of view. Such an analysis...
3.3 Jitter in PLLs The main concern for jitter in digital systems is the decrease in timing margin that it causes. Controlling jitter allows more flexibility in the timing budget. For example,...
