Pipelined Analog-to-digital Converters (ADCs)

Analog-to-digital converters (ADCs) that use pipeline architecture effectively overcome the limitations of flash architecture. Pipelined ADCs divide the conversion task into several consecutive stages. Each of these stages consists of a sample and hold circuit, an m-bit ADC (e.g., a flash converter), and an m-bit D/A converter (DAC). First, the sample-and-hold circuit of the first stage acquires the signal. The m-bit flash converter then converts the sampled signal to digital data. The conversion result forms the most significant bits of the digital output. This same digital output is fed into an m-bit digital-to-analog converter, and its output is subtracted from the original sampled signal. The residual analog signal is then amplified and sent on to the next stage in the pipeline to be sampled and converted as it was in the first stage. This process is repeated through as many stages as are necessary to achieve the desired resolution. Pipelined ADCs achieve higher resolutions than flash converters containing a similar number of comparators. This comes at the price of increasing the total conversion time from one cycle to p cycles.