Subranging architecture is basically a combination of the flash and the successive approximation architectures. It breaks an n-bit conversion into m sub-conversions. Like the pipelined architecture, subranging architecture consists of several cascaded stages, each of which includes a low-resolution analog-to-digital converter (ADC) to achieve a coarse estimation of the input, an accurate digital-to-analog converter (DAC) to convert the output of the ADC into an analog version of the estimation, a subtractor to get the residue (the difference between the actual output and its estimation), and a gain block to amplify and to restore the residue to an appropriate level for further estimation by the next stage. Basically, a subranging converter is similar to a pipelined converter, but without the sample-and-hold circuit.