Introduction to Advanced System-on-Chip Test Design and Optimization

By Erik Larsson

Introduction to Advanced System-on-Chip Test Design and Optimization

Shedding light on the many issues that come to play in the arena of modular SOC testing, this book describes the problems related to SOC testing, and discusses the modeling granularity and the implementation into EDA (electronic design automation) tools.

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Table of Contents

The following content is available for browsing from this book:

Introduction to Advanced System-on-Chip Test Design and Optimization

Part 1: Testing Concepts

Part 2: SOC Design for Testability

Part 3: Soc Test Applications

Chapter 10: A Reconfigurable Power-Conscious Core Wrapper and its Application to System-on-Chip Test Scheduling

Chapter 11: An Integrated Framework for the Design and Optimization of SOC Test Solutions

Chapter 12: Efficient Test Solutions for Core-Based Designs

Chapter 13: Core Selection in the SOC Test Design-Flow

Chapter 14: Defect-Aware Test Scheduling

Chapter 15: An Integrated Technique for Test Vector Selection and Test Scheduling under ATE Memory Depth Constraint

Appendix 1: Benchmarks

References

Index

List of Figures

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