Guide to RISC Processors: For Programmers and Engineers

Guide to RISC Processors For Programmers and Engineers

Sivarama P. Dandamudi
School of Computer Science Carleton University
Ottawa, ON K1S 5B6. Canada sivarama@scs.carleton.ca

Library of Congress Cataloging-in-Publication Data

Dandamudi, Sivarama P., 1955     Guide to RISC processors / Sivarama P. Dandamudi.      p.     cm.    Includes bibliographical references and index.

ISBN 0-387-21017-2 (alk. paper)


1. Reduced instruction set computers. 2. Computer architecture. 3. Assembler language (Computer program language) 4. Microprocessors Programming. I. Title.

QA76.5.D2515 2004

004.3 dc22 2004051373

ISBN 0-387-21017-2

9780387210179

Printed on acid-free paper.

2005 Springer Science+Business Media, Inc.

All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, Inc., 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden.

The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights.

Printed in the United States of America. (HAM)

9 8 7 6 5 4 3 2 1 SPIN 10984949

springeronline.com

To my parents, Subba Rao and Prameela Rani, my wife, Sobha, and my daughter, Veda

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