Processor Design: System-On-Chip Computing for ASICs and FPGAs

In the beginning, there were no CISCs or RISCs just computers. Computer processors and their instruction sets evolved in an increasingly Byzantine way over time as processor designers sought to improve performance through hardware extensions. The rapid and unchecked advance of Moore s law doubled the number of transistors with each integrated-circuit process generation and processor designers used this added capacity to create increasingly complex machines with increasingly more complex instruction sets. These new complex instructions had ever more complex addressing modes and included many variations of relatively simple basic instructions so that programmers could choose exactly the right instruction in each case. Extreme CISC ISAs could include many hundreds of instructions.
There were four intertwined motivations for creating increasingly more complex ISAs:
Early HLL compilers were not very good in generating optimized code. In theory, an ISA with more complex instructions would be an easier target for compiler writers. In practice, they weren t. For example, DEC s (Digital Equipment Corp s) extremely successful VAX ISA included hundreds of instructions, many of them quite complex. During the development of an 8-chip VLSI version of the VAX processor, DEC engineers discovered that 20% of the VAX instructions consumed 60% of the machine s microcode but represented 0.2% of the executed instructions [335].
Memory cost and memory bandwidth were major concerns for computer designers. Code size was also of concern because of memory costs and complex instructions, if effectively...