Using a Timer and I/O Pins to Interface 8051 MCUs with I2C Serial EEPROMs

AN1147 2 Interfacing 8051 MCUs with I C™ Serial EEPROMs This application note is part of a series that provide Author: Alexandru Valeanu source code to help the user implement the protocol Microchip Technology Inc. with minimal effort. Figure 1 is the hardware schematic depicting the 2 INTRODUCTION Cinterface between the Microchip 24XXX series of I serial EEPROMs and NXP's P89LPC952 8051-based The 24XXX series serial EEPROMs from Microchip MCU. The schematic shows the connections Technology support a bidirectional, 2-wire bus and data necessary between the MCU and the serial EEPROM transmission protocol. The bus is controlled by the as tested, as well as the required pull-up resistors on microcontroller (master), which generates the Serial the clock line (SCL) and data line (SDA). Not illustrated Clock (SCL), controls the bus access and generates in this application note are the write-protect feature and the Start and Stop conditions, while the 24XXX serial the cascading of multiple devices; thus, the WP pin and EEPROM works as slave. The 24XXX serial SS (ground).address pins A0, A1 and A2 are tied to V 2 C™ compatible and have maximumEEPROMs are I The test software was written assuming these clock frequencies ranging from 100 kHz to 1 MHz. connections. The main features of the 24XXX serial EEPROMs are: 2 C compatible* 2-wire serial interface bus, I * EEPROM densities from 128 bits to 512 Kbits * Bus speed from 100 kHz to 1 MHz * Voltage range from 1.7V to 5.5V * Low power operation * Temperature range from -40°C to +125°C * Over 1,000,000 erase/write cycles * Up to 8 devices may be connected to same bus 2 FIGURE 1: CIRCUIT FOR P89LPC952 MCU AND 24XXX SERIES I C SERIAL EEPROM Vcc 24XX512 A0 Vcc1 8 4.7 k? A1 2 7 WP 7/SDAP1.3 INT0 8A2 3 T0/SCLP1.2 SCL6 P89LPC952 SDAVss 54 Note: A decoupling capacitor (typically 0.1 µF) should be used to filter noise on VCC.