Digital Signal Processors (DSP) Specifications

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General Specifications


	Data Bus		Data buses are bidirectional sets of conductive paths that transfer data or instruction codes into digital signal processors (DSPs). Data buses also transfer the results of operations and computations from DSPs.
	Your choices are...
	8-Bit		DSPs have an 8-bit data bus.
	16-Bit		DSPs have a 16-bit data bus.
	24-Bit		DSPs have a 24-bit data bus.
	32-Bit		DSPs have a 32-bit data bus.
	64-Bit		DSPs have a 64-bit data bus.
	128-Bit		DSPs have a 128-bit data bus.
	256-Bit		DSPs have a 256-bit data bus.
	Other		Other unlisted data buses.
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	Supply Voltage:
	Your choices are...
	-5 V		DSPs operate with -5 volts.
	-4.5 V		DSPs operate with -4.5 volts.
	-3.3 V		DSPs operate with -3.3 volts.
	-3 V		DSPs operate with -3 volts.
	1.2 V		DSPs operate with 1.2 volts.
	1.5 V		DSPs operate with 1.5 volts.
	1.8 V		DSPs operate with 1.8 volts.
	2.5 V		DSPs operate with 2.5 volts.
	3 V		DSPs operate with 3 volts.
	3.3 V		DSPs operate with 3.3 volts.
	3.6V		DSPs operate with 3.6 volts.
	5 V		DSPs operate with 5 volts.
	Other		Other unlisted supply voltages.
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Packaging Information


	Package Type:
	Your choices are...
	BGA		Ball grid array (BGA) is a type of memory chip with soldered balls on the underside for mounting. Use of BGA allows die package size to be reduced because there is more surface area for attachment. Smaller packaging allows more components to be mounted on a module, making greater densities available. The smaller package also improves heat dissipation for better performance.
	PBGA		Plastic-ball grid array (PBGA).
	TBGA		Tape-ball grid array (TBGA).
	FLGA		Fine-pitch land grid array (FLGA).
	QFP		Quad flat package (QFP).
	LFQP		Low-profile quad flat package (LFQP).
	TQFP		Thin quad flat package (TQFP).
	SOP / SO		Small outline package (SOP).
	SOIC		Small outline IC (SOIC).
	TSOP Types I, II		Thin small outline package (TSOP) is a type of DRAM package that uses gull wing shaped leads on both sides. TSOP DRAM mounts directly on the surface of the printed circuit board. The advantage of the TSOP package is that it is one-third the thickness of an SOJ package. TSOP components are commonly used in small outline DIMM and credit card memory applications. Thin small outline package may be Type I or Type II.
	SSOP		Shrink small outline package (SSOP).
	TSSOP		Thin shrink small outline L-leaded package (TSSOP).
	TVSOP		Thin very small outline package (TVSOP).
	SOJ		Small outline J-lead (SOJ) is a common form of surface-mount DRAM packaging. It is a rectangular package with J-shaped leads on the two long sides of the device.
	HSOF		Small outline flat-leaded package with heat sink (HSOF).
	PLCC		Plastic leaded chip carrier (PLCC).
	LCCC		Leadless ceramic chip carrier (LCCC).
	DIP		Dual in-line packages (DIP) are a type of DRAM component packaging. DIPs can be installed either in sockets or permanently soldered into holes extending into the surface of the printed circuit board.
	SIP		Single inline package (SIP).
	SDIP		Shrink dual inline package (SDIP).
	SZIP		Shrink zigzag inline package (SZIP).
	Other		Other unlisted, specialized, or proprietary IC package types.
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	Pin Count		The number of pins in the package.
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Performance


	Clock Speed:		DSP clock speed is usually expressed in megahertz (MHz) or gigahertz (GHz).
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	MIPS:		Million instructions per second (MIPS) measures DSP processing power.
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	MFLOPS:		Million floating-point operations per second (MFLOPS) measures processing power for floating-point DSPs.
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	MMACS:		Million multiply / accumulates per second (MMACS) measures DSP processing power.
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	Operating Current		This is the operating current of the chip.
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	Power Dissipation		This is the power dissipation of the chip during normal operation.
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	Operating Temperature:		This is the DSP operating temperature.
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I/O Ports and Interfaces I/O ports and interfaces provide data paths between DSPs and external devices such as keyboards, displays, or readers. These connections may provide only inputs, only outputs, or both inputs and outputs.


	DMA Channels		Direct memory access (DMA) is a way to directly interface DSPs to memory without using the CPU for control. Enter the number of DMA channels for the DSP.
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	I/O Ports		The number of I/O ports is equal to the number of input, output, and general-purpose ports, or lines, combined.
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	Interfaces
	Your choices are...
	I²C		The Inter-IC (I²C) bus is a two-wire serial bus designed by Phillips that provides a communications link between integrated circuits. I²Cs are used to control and monitor applications in communications, computer, and industrial settings. Physically, the bus consists of two active wires and a ground connection. The active wires, the serial data line (SDA) and the serial clock line (SCL), are both bidirectional. Each component that is connected to the bus has a unique address and can, depending on its functionality, receive and/or transmit information.
	PCI		Peripheral component interconnect (PCI).
	SPI		Serial peripheral interface (SPI) is a four-wire, full duplex, synchronous serial data link. SPI was originally developed by Motorola to provide a glueless microcontroller interface to industry-standard serial devices, such as EEPROM, and other serial devices.
	UART		Universal asynchronous receiver transmitter (UART) accepts parallel data information and converts it into an asynchronous serial data stream. Generically, UART devices are capable of implementing a variety of asynchronous serial protocols, such as RS-232, HDLC and SDLC. In this context, UART refers to the operating mode of the switching control center system (SCCS) that provides this functionality.
	USART		Universal synchronous asynchronous receiver transmitter (USART) supports a wide range of software programmable baud rates and data formats
	USB		Universal serial bus (USB).
	JTAG		The Joint Test Action Group (JTAG) is a standards organization that created an interface, the JTAG test access port (TAP), that allows access to the inner workings of ICs for testing, controlling, and programming purposes.
	ESSI		Enhanced synchronous serial interface (ESSI).
	SCI		Serial communications interface (SCI).
	Other		Other unlisted interfaces.
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	External Memory Interface:		The external memory interface determines the amount of external memory a chip can handle. The amount of external memory depends upon the amount of addresses the DSP can handle, which in turn is dependent upon the size of the memory address bus.
	Your choices are...
	None		DSPs do not have an external memory interface.
	16-Bit		DSPs have a 16-bit external memory interface.
	32 Bit		DSPs have a 32-bit external memory interface.
	64 Bit		DSPs have a 64-bit external memory interface.
	128 Bit		DSPs have a 128-bit external memory interface.
	Other		Other unlisted external memory interfaces.
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Features


	On-Chip PLL / DLL?		Integrated on-chip phase-locked loops (PLLs) and delay-locked loops (DLL) with clock frequency synthesis capabilities are used to design high-speed internal clocks for data sampling in DSP applications. PLLs and DLLs provide designers with more control over the clock frequencies used in integrated designs. This is vital for system integration because different system parts operate at different clock frequencies.
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	On-Chip A/D Converters?		On-chip A/D converters are devices that convert analog inputs into digital signals. For example, sine wave inputs can be converted into a series of numbers that represent the value of the input curve at any given point on the curve. The number of bits and the sample rate determine the resolution of the converter. Greater numbers of bits and faster sample rates are preferable.
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	Embedded Timers?		DSPs have an embedded timer.
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	Flash Memory?		DSPs have Flash memory.
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Digital Signal Processors (DSP) Specifications

Data Bus:

Supply Voltage:

Package Type:

Pin Count:

Clock Speed:

MIPS:

MFLOPS:

MMACS:

Operating Current:

Power Dissipation:

DMA Channels:

I/O Ports:

Interfaces:

External Memory Interface:

On-Chip PLL / DLL?

On-Chip A/D Converters?

Embedded Timers?

Flash Memory?

Help with Digital Signal Processors (DSP) specifications: