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Key Design Considerations Not Seen On Datasheets: Are You Wasting Money, Space and Efficiency By Overdesign?

Hybrid and electric vehicles, medical, and aerospace applications are driving more thermally tolerant, higher efficiency and more compact SiC switching topologies. Register to learn fundamental SiC design considerations beyond what’s typically shown on datasheets.

Date: July 9, 2020
Time: 11 AM EDT (8 AM PDT / 5:00 PM CEST)
Duration: 1 hour
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Power engineers often attempt to design for worst case conditions with what's beyond the spec; Microchip calls this approach the "unknown unknowns". Engineers end up overdesigning their system that include, for example, the drain-to-source voltage margin, MOSFET gate drive strength, system redundancy, etc. that impact the complexity, form factor and ultimately the cost of the platform.

Instead, engineers should be asking this question: Are you wasting money, valuable space, and switching efficiency by overdesign of your system?

This presentation covers the growth of SiC semiconductor market and benefits of using SiC products in high voltage, high power switching applications. Attendees will learn about where silicon MOSFET/IGBT and GaN technologies and solutions fall short in these application areas and get an overview of SiC discrete, power module, gate driver, reference design and evaluation board offerings from Microchip.

In addition, attendees will understand how Microchip addresses products with Quality, Supply and Support (QSS) and offers a one-stop shop for your total system solution (TSS) needs with the company's broad product portfolio beyond SiC products.

Key Takeaways

  • Understand how SiC design considerations including avalanche capability, short circuit withstand test capability and SiC MOSFET body diode reliability impact switching and system reliability
  • Learn about Microchip SiC discretes, power modules and gate driver products, as well as SiC reference design solutions and helpful resource links
  • Find out how Microchip's Quality, Supply and Support (QSS) methodology mitigates risk for your manufacturing process


Dr. Avinash Kashyap, Director of Silicon Carbide Technology & Development and Head of Research & Development, Microchip Technology

Dr. Avinash Kashyap is the Director of Silicon Carbide Technology & Development and Head of R&D for power discretes at Microchip Technology. Dr. Kashyap leads multiple groups ranging from device design, process integration and test. He is responsible for creating product roadmaps and execution of various critical silicon and wide bandgap programs including SiC FETs and diodes, Si low voltage FETs, rad-hard FETs and RF power switches.

He has been involved in the development of SiC technology since its infancy for more than 17 years including device design, SPICE modeling, applications engineering, business development and commercialization. He has authored more than 35 peer-reviewed publications and has over 20 patents granted or pending. Dr. Kashyap holds a Ph,D. in electrical engineering from the University of Arkansas, Fayetteville. He is a senior member of the IEEE.