Products/Services for TTL Logic Gated S-R Latch

  • Logic Latches-Image
    Logic Latches - (44 companies)
    Latches. Several types of Logic latches are available. Data (D) and transparent D latches have a data input. S-R latches have either set (S) and reset (R) inputs, or set (S) and clear (C) inputs. Gate S-R latches have an enable input. Logic latches...
    Latch Type
    Output Characteristics
    Supply Voltage
  • Latches-Image
    Latches - (253 companies)
    Latches are mechanical components that hold a door, drawer, or cabinet closed. Typically, latches do not lock; however, some latches provide locking features. Description. Latches are mechanical components that hold doors, drawers, or cabinets...
  • Flip-Flops-Image
    Flip-Flops - (63 companies)
    ...families. Transistor-transistor logic (TTL) and related technologies such as Fairchild advanced Schottky TTL (FAST) use transistors as digital switches. By contrast, emitter coupled logic (ECL) uses transistors to steer current through gates that compute...
  • Logic Gates-Image
    Logic Gates - (81 companies)
    Logic gates are electronic circuits that combine digital signals according to boolean algebra. Logic gates are circuits with electronically controlled switches that combine digital signals according to Boolean algebra. In binary math, bits have only...
  • Field-Programmable Gate Arrays (FPGA)-Image
    Field-Programmable Gate Arrays (FPGA) - (110 companies)
    Field-programmable gate arrays (FPGAs) have a different architecture than SPLDs and CPLDs, and typically offer higher capacities. FPGAs are also known as logic cell arrays (LCA) and programmable ASIC (pASIC). Field-programmable gate arrays (FPGAs...
  •  
    Gate Drivers - (93 companies)
    ...of transistor-transistor logic (TTL), complementary metal-oxide semiconductor (CMOS), pulse width modulation, and combinations such as TTL/CMOS and TTL/PWM. Integrated protection types include over-voltage protection (OVP), over-voltage protection...
  •  
    Gate Valves - (1131 companies)
    Gate valves and knife valves are linear motion valves in which a flat closure element slides into the media stream to shut off flow. Gate valves (also known as knife valves or slide valves) are linear motion valves in which a flat closure element...
  •  
    Logic Adders - (27 companies)
    ...advanced Schottky TTL (FAST) use transistors as digital switches. Emitter coupled logic (ECL) use transistors to steer current through gates that compute logical functions. Complementary metal-oxide semiconductor (CMOS) uses a combination of p-type...
  •  
    Logic Encoders - (65 companies)
    Transistor-transistor logic (TTL) and related technologies such as Fairchild advanced Schottky TTL (FAST) use transistors as digital switches. By contrast, emitter coupled logic (ECL) uses transistors to steer current through gates that compute logical functions...
  •  
    Programmable Logic Devices (PLD) - (194 companies)
    ...offer much smaller amounts of logic - up to about 10,000 gates. But CPLDs offer very predictable timing characteristics and are therefore ideal for critical control applications. Some CPLDs require extremely low amounts of power and are very...

Product News

More Information

Lock Indicates content that may require registration and/or purchase. Powered by IHS Goldfire

  • A 12-bit successive-approximation-type ADC with digital error correction
    outputs are TTL /CMOS compatible. The 14-bit shift register, logic gating , correction logic, latches , and up/down counter form the Smart SAR which interfaces to the output buffers and the D/A converter inputs. This reset sets the MSB of the 14-bit shift register to logic ONE and the rest of the bits to S - R ,%UP/LIOWN COUNTER .
  • Latches | Mouser
    S - R Latch Single- Gate TTL Logic Family .
  • Computing Comes to Life » American Scientist
    The logic "family" might be named RRL, for repressor-repressor logic, in analogy with the long-established TTL , which stands for transistor-transistor logic . The basic NOT gate in RRL will be a gene encoding some repressor protein (call it Y … … also be coupled together to form the computer memory element known as a flip-flop, or latch . S and R stand for "set" and "reset." .
  • 2012 International Conference on Devices, Circuits and Systems (ICDCS)
    In many of the popular logic styles, such as TTL and traditional CMOS, this principle can be rephrased as a statement that there is always a low-impedance path between the output and either the supply voltage or the ground. … a minimum clock rate fast enough that the output state of each dynamic gate is used before … This clever circuit consists of two stages implemented by SR NAND latches . … two D input states (0 and 1 ) to two input combinations (0 1 and 1 0) for the output SR latch by inverting the data input signal (both the circuits split the single D signal in two complementary S and R signals).
  • Hybrid higher radix JK flipflop sequencer with ASIC implementation potential
    … from twin voltage rails (5 and 1OV)with logical 1 compatible with standard TTL and logical 2 … A sufficientnumber (m) of binary JKs are embedded such that 2" s R . Binary logic forms a JK condition encoder (for the embedded JKs) and its inputs include the comparator … … flop sequencer represents a potential solution, configured as a modulo-R D-type latch , to the modulo … The other two structures can be accommodated using modulo-R U- gates ' with appropriate control signatures.
  • Monolithic SMPTE Time Code Reader LSI using Gate Array
    Latch S / R Table 2 Contents of logic gates of X 18 in Table I 4 TTL PROM 1K .
  • Delay and power optimized register blocks for the low power microcontrollers
    In many of the popular logic styles, such as TTL and traditional CMOS, this principle can be rephrased as a statement that there is always a low-impedance path between the output and either the supply voltage or the ground. … a minimum clock rate fast enough that the output state of each dynamic gate is used before … Transmission logic implementation ofDflipflop This clever circuit consists of two stages implemented by SR NAND latches . … convert the two D input states (0 and 1) to two input combinations (01 and 10) for the output SR latch by inverting the data input signal (both the circuits split the single D signal in two complementary S and R signals).
  • System design for automated airborne data acquisition
    The Control Unit design uses low-power Schottky transistor-transistor logic (LS- TTL ). … to each flight, before the recording pro- cess bigins, the Control Unit memory latches (54LS374) receive and … Each set of t h r e e c o u n t e r s a r e cascaded t o g e t h e r t o produce t h e r e q u i r e d … … i s clocked from t h e o u t p u t of an OR- gate .
  • Multichannel counter for molecular beam time-of-flight experiments
    The circuit block labelled in figure 4 as 'strobe and interrupt logic ' handles the computer dialogue … … the shift register is switched by the data selectors 74 175 from the latch to the input … … IC M137 are the shift registers and the IC 74157 are the switching gates to clear and … - , . ~ r i g s e r . EWr. count . :as' c l c c k l . References Alfke P and Larsen I (eds) 1973 TTL Application Handbook .
  • A TTL programmable logic array and its applications
    The design in Fig. 1uses several TTL devices SN 7400,7410,7486, and 74175. 4-bit latch 74175 is featured with docked enable (stroke) and the direct dear control. These features greatly facilitate the addressingand programmingschemesto be d e s c r i i below. … control codes or microprograms, one can use a PLA as a common scratchpad logic module for performing … AU the logic gates and memory latches cau be selected from the same ‘TL logic family.