MICRO: Defect/Yield Analysis and Metrology

Oliver D. Patterson and Horatio Wildman, Doron Gal and Kevin Wu, In-line voltage contrast inspection is a well-developed method for detecting hard shorts and opens. The technique is quite commonly used in the semiconductor industry to detect contact and via opens as well as metal, gate-level, and active-area shorts. These inspections provide timely and high-quality feedback to achieve yield improvements and line health monitoring. ICs are also susceptible to softer defects, such as vias and contacts with elevated resistance, and resistive shorts between metal runners. While inspection scanning electron microscopy (SEM) can detect via chains with soft opens such as that illustrated in Figure 1, which was caused by voiding, SEM’s ability to detect these types of failures is not well established. In this case, probe data indicated that via chain resistances were elevated from tenfold to a thousandfold. Knowing exactly what resistances can be detected and how the signal varies with changes in resistance would be of great value. This article highlights an effort by IBM (Hopewell Junction, NY) and KLA-Tencor (San Jose) to quantify such an inspection method. Programmed defects (PDs) provide an effective way to calibrate an inspection system. Because the metal runners illustrated in Figures 2 and 3 were alternately grounded or floating, they appear in the images as bright or dark, respectively. By creating an open, as shown in Figure 2, a normally bright line becomes dark. By creating a bridge, as shown in Figure 3, a normally dark line becomes bright. Inspection conditions can be tuned so that nearly all PDs can be detected, while most nuisance defects are ignored. That concept was applied in this study. To establish the sensitivity of an inspection SEM to resistive opens and shorts, an experiment was performed in which structures with resistive defects were designed using integrated polysilicon