From Silicon Labs
High speed, high performance timing applications often require a combination of XO/VCXOs, clock generators,
clock buffers and jitter cleaning clocks to satisfy system timing requirements. Each component in the clock tree
adds phase jitter to the starting reference clock. Care must be taken during the timing component selection process
to select devices that meet system price/performance goals while providing the lowest jitter and highest system
noise margin possible. The next question that arises is how to estimate the total clock jitter through the clock tree to
ensure there is adequate system-level margin to reliably meet the application jitter requirements. If this jitter
threshold is exceeded in high-speed SerDes applications, for example, it could have a detrimental impact on the
Bit-Error Rate (BER) of the associated high-speed communications link. By ensuring jitter design targets are
properly met, system timing related problems can be avoided. The application note discusses three common
approaches to estimate total clock tree jitter with the focus on additive jitter when using the Si5330x clock buffer.
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Topics of Interest
A "one size fits all" strategy does not apply when it comes to clock tree design. Optimizing the clock tree to meet both performance and cost requirements depends on a number of factors, including the...
3.3 Jitter in PLLs The main concern for jitter in digital systems is the decrease in timing margin that it causes. Controlling jitter allows more flexibility in the timing budget. For example,...
Jitter is defined as the timing uncertainty of an edge. In order to determine the timing uncertainty of a serial data signal edge, this edge must be compared to a reference clock edge. For most high...
Picking the right device for a particular application is dependent on a number of factors, including whether or not the clocks must be synchronized to an externally provided reference clock, the...
Oscilloscopes have been used extensively to analyze the jitter performance of serial data links providing estimates (measurements) of total jitter as well as its "random" and "deterministic" parts.
