Emitter Coupled Logic (ECL)

Emitter coupled logic (ECL) uses transistors to steer current through gates that compute logical functions. By comparison, TTL and related families use transistors as digital switches where the transistors are either cut off or saturated, depending on the state of the circuit. Because the transistors are always in the active region, they can change state very rapidly and can operate at very high speed. This is also its major disadvantage; the transistors are continually drawing current, which means the circuits require high power. Thus, they can generate large amounts of waste heat. ECL gates use differential amplifier configurations at the input stage. A bias configuration supplies a constant voltage at the midrange of the low and high logic levels to the differential amplifier, so that the appropriate logical function of the input voltages will control the amplifier and the base of the output transistor. The propagation time for this arrangement can be less than a nanosecond. Other noteworthy characteristics of the ECL family include the fact that the large current requirement is approximately constant, and does not depend significantly on the state of the circuit. This means that ECL circuits generate relatively little power noise unlike many other logic types that typically draw far more current when switching than quiescent, for which power noise can become problematic. ECL circuits operate with negative power supplies and logic levels incompatible with other families, which means that interoperation between ECL and other designs are difficult. The fact that the high and low logic levels are relatively close mean that ECL suffers from small noise margins, which can be troublesome in some circumstances.