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Supplier: Win Source Electronics
Description: Supply Voltage: 1.5V, 3.3V Function: EFM-(Ethernet First Mile) Symmetrical DSL Transceiver Interface: HDLC, Parallel, Serial Part Status: Obsolete(EOL) Includes: Bit Error Tester, Echo Cancellation and Equalization, PHY Aggregation Function (PAF) Categories: Integrated Circuits (ICs)
- Supply Voltage: Other
- TJ: -40 to 85 C
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Supplier: Win Source Electronics
Description: Supply Voltage: 1.5V, 3.3V Function: EFM-(Ethernet First Mile) Symmetrical DSL Transceiver Interface: HDLC, Parallel, Serial Part Status: Obsolete(EOL) Includes: Bit Error Tester, Echo Cancellation and Equalization, PHY Aggregation Function (PAF) Categories: Integrated Circuits (ICs)
- Supply Voltage: Other
- TJ: -40 to 85 C
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Supplier: Integrated Device Technology
Description: The IDT1894 -32 is a low-power, physical-layer device ( PHY ) that supports the ISO / IEC 10Base-T and 100Base- TX Carrier-Sense Multiple Access/Collision Detection ( CSMA / CD ) Ethernet standards, ISO / IEC 8802-3. The IDT1894 -32 is intended for MII , Node applications that require the
- IC Package Type: VQFP, Other
- Pin Count: 32 #
- Supply Voltage: 3.3 V
- TJ: 0.0 to 70 C
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Supplier: Integrated Device Technology
Description: The IDT1894 -40 is a low-power, physical-layer device ( PHY ) that supports the ISO / IEC 10Base-T and 100Base- TX Carrier-Sense Multiple Access/Collision Detection ( CSMA / CD ) Ethernet standards, ISO / IEC 8802-3. The IDT1894 -40 is intended for MII , Node applications that require the
- IC Package Type: VQFP, Other
- Pin Count: 40 #
- Supply Voltage: 3.3 V
- TJ: 0.0 to 70 C
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Supplier: Integrated Device Technology
Description: The IDT1893C is a low-power, physical-layer device ( PHY ) that supports the ISO / IEC 10Base-T and 100Base- TX Carrier-Sense Multiple Access/Collision Detection ( CSMA / CD ) Ethernet standards, ISO / IEC 8802-3. The IDT1893C is intended for MII , Node applications that require the Auto-
- IC Package Type: SSOP, Other
- Pin Count: 48 #
- Supply Voltage: 3.3 V
- TJ: 0.0 to 70 C
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Supplier: Microchip Technology, Inc.
Description: . *The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account. Additional Features Highlights Single-Chip Ethernet Physical Layer Transceiver (PHY) Compliant with IEEE 802.3ab
- Form Factor / Package: Surface Mount Technology (SMT), Other
- Operating Temperature: -40 to 85 C
- Supply Voltage: 1.2 volts
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Supplier: Microchip Technology, Inc.
Description: The Microchip LAN8810/LAN8810i is a low-power 10BASE-T/100BASE-TX/ 1000BASE-T Gigabit Ethernet physical layer (PHY) transceiver with variable I/O voltage that is fully compliant with the IEEE 802.3 and 802.3ab standards. The LAN8810/LAN8810i can be configured to communicate with an
- Form Factor / Package: Surface Mount Technology (SMT), Other
- Operating Temperature: -40 to 85 C
- Supply Voltage: 1.2 volts
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Supplier: Microchip Technology, Inc.
Description: The Microchip LAN8187/LAN8187i is a low-power industrial temperature (LAN8187i), variable I/O voltage, Ethernet Transceiver (PHY) with HP Auto-MDIX for high-performance embedded Ethernet applications. The LAN8187/LAN8187i can be configured to operate on a single 3.3V supply utilizing an
- Form Factor / Package: Surface Mount Technology (SMT), Other
- Operating Temperature: -40 to 85 C
- Supply Voltage: 3.3 volts
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Supplier: Microchip Technology, Inc.
Description: 8700i are not recommended for new designs. The LAN8710/LAN8720 are the suggested replacement devices for these products. Features Single-Chip Ethernet Physical Layer Transceiver (PHY) ESD Protection levels of ±8kV HBM without external protection devices ESD
- Form Factor / Package: Surface Mount Technology (SMT), Other
- Operating Temperature: -40 to 85 C
- Supply Voltage: 3.3 volts
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TI adds MIPS-based broadband processor to ADSL chip set for gateway solutions
The processors also leverage TI's Asymmetric DSL physical layer ( PHY ) chip architecture, which has been certified by local exchange carriers (LEC), said Riley.
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Session 18 Overview: Consumer Signal Processing
The chip integrates a C62x based DSL PHY , AFE, Line Driver and Receiver, power management, and broadband controller subsystem.
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A DSL customer-premise equipment modem SoC with extended reach/rate for broadband bridging and routing
The full chip con- sists of a C62xTM based DSL PHY , AFE, Line Driver and Receiver, power management, and broadband controller subsystem for an end-to-end Bridge/Router for residential gateway applications, as shown in Fig. 18.7.1.
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An ADSL2 and VDSL2 CPE System-on-Chip with Integrated Voice over IP Capabilities for Residential Gateway Applications
This 90nm CMOS technology chip integrates high speed data converters, DSL PHY , 4-VOIP channel Voice subsystem, MIPS based broadband controller and a range of networking peripherals.
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Hot Embedded DSP Market Almost Twice The General-Purpose DSP Market According To New Forward Concepts Study
But, it also includes embedded DSP in communications chips for GbE LAN PHYs , WLAN and Bluetooth basebands as well as DSL and cable modems.
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Hot Embedded DSP Market Almost Twice the General-Purpose DSP Market, According to New Forward Concepts Study
But, that market segment also includes embedded DSP in communications chips for GbE LAN PHYs , WLAN, WiMAX and Bluetooth basebands, as well as DSL and cable modems.
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ADSL Modem Chipset from STMicroelectronics Receives Microsoft Approval for Windows Vista Drivers
… active within emerging markets, enabling them to significantly increase their subscriber base by offering affordable DSL servicesâ. The Unicorn II chipset consists of the ST70138 Controllerless Transceiver, with integrated DMT (Discrete Multi-Tone) engine, control logic and USB Physical-layer interface ( PHY ); and the MTC20174 ADSL Analog Front End (AFE) chip , which integrates the AFE, line driver and DCXO …
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Analog front-end and power management integration on a 0.13 /spl mu/m CMOS ADSL SoC
Key components in the AFE are the receive (U)and transmit (TX) channel for the DSL PHY and the clocking blocks for timing recovery (Figure 2). The on- chip power converters generate the 1.5Vand 12V supplies for digital core and line driver …
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A 0.13/spl mu/m CMOS four-channel ADSL2+ analog front-end for CO applications with 75mW per channel
The key components of the AFE are the receive and transmit channels for the DSL PHY and the clocking blocks for timing recovery (Fig. 22.2.1). The on- chip power converters generate the 1.5V and 12V supplies for digital core and line …
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• DSL Chips • Ethernet PHY Chips .