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Supplier: CoorsTek
Description: End effectors, also referred to as semiconductor handling "blades", are the robot's hand to handle and move semiconductor wafers between positions. So end effectors must be dimensionally precise and thermally stable, while having a smooth, abrasion-resistant surface to safely handle
- Applications: Chemical / Materials Processing, Wear Parts / Tooling
- Shape / Form: Wafer Carrier / Holder
- Silicate and Clay Based Material Type: Quartz
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Supplier: CoorsTek
Description: CoorsTek photomask substrates are made from high-purity synthetic quartz glass to deliver superior UV and visible light transmittance, thermal stability, electrical insulation, low birefringence, and durable chemical stability. Advanced, scalable polishing technology makes these photomask
- Applications: Other
- Material Type: Other
- Shape / Form: Wafer Carrier / Holder
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Supplier: CoorsTek
Description: CoorsTek provides wafer boats, pedestals, and custom wafer carriers for both vertical / column and horizontal configurations. Advanced ceramics deliver excellent thermal resistance and plasma durability while mitigating particles and contaminants. Semiconductor-grade silicon
- Applications: Other
- Shape / Form: Fabricated / Custom Shape, Wafer Carrier / Holder
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Supplier: CoorsTek
Description: Lift pins are used in assemblies to lift and move wafers through semiconductor processing positions. Since they are exposed to chamber or other processing conditions, they require robust thermal stability and corrosion resistance. Semiconductor Processing Components Coors
- Applications: Chemical / Materials Processing, Wear Parts / Tooling
- Shape / Form: Wafer Carrier / Holder
- Silicate and Clay Based Material Type: Quartz
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Supplier: Precision Surfacing Solutions
Description: be used for processing large Plano optics including : Calcium, Fluoride, Fused, Silica, BK7, Quartz, Zerodur etc. In addition to processing a wide variety of materials in an extensive range of industries : L.C.D, Faceplates, Silicon Wafers, I.C, Photo masks, Crystalline substrates
- Coating System Type: Batch System (Single Chamber / Multiple Wafers), Continuous / Web System, Inline System (Semi-continuous)
- Features: Integral Process Controller?, Automated Loading?
- Materials Processed (Deposit or Substrate): Metal, Dielectric / Ceramic, Silicon, Oxides, Other
- Maximum Part Diameter / Width: 780 mm
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Watch>> - Sapphire for GaAs, Indium Phosphide, & Other Semiconductors Sapphire Wafer Carriers (read more)
Browse Wafer Cassettes Datasheets for Insaco, Inc. -
Watch>> - Sapphire for GaAs, Indium Phosphide, & Other Semiconductors Sapphire Wafer Carriers (read more)
Browse Wafer Cassettes Datasheets for Insaco, Inc. -
INSACO Offers Wafer Carriers With or Without Multiple Holes INSACO, Inc has become recognized as a worldwide leader in custom machined ceramic and sapphire parts for the semiconductor industry. Through this experience (read more)
Browse Glass Fabrication Services Datasheets for Insaco, Inc.
More Information Top
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Machining Of Sapphire Wafer Carriers - Process, Applications and Benefits
Advantages of Sapphire over Quartz Wafer Carriers .
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Free standing yttria-doped zirconia membranes: Geometrical effects on stability
SPR 220 was patterned on Si wafers, which were then mounted to a quartz carrier wafer using CrystalbondTM dissolved in acetone.
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Ambient Intelligence with Microsystems
It was concluded that the optimum solution was to use a laser ablation technique, targeting the interface between the polyimide and a quartz carrier wafer .
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Semiconductor Manufacturing Handbook > ESD CONTROLS IN CLEANROOM ENVIRONMENTS
Teflon and quartz wafer carriers , oxide-coated wafers, epoxy integrated circuit (IC) packages, and glass hard disk media are examples of insulators in the cleanroom.
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http://dspace.mit.edu/bitstream/handle/1721.1/8368/50550216-MIT.pdf?sequence=2
Although not used for this work, it is believed [28] that quartz wafer carriers may minimize void formation.
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Silicon-on-insulator (SOI) wafer fabrication for MEMS applications
Wafers are loaded in a cradle shaped quartz wafer carrier with vertical slots for holding them in place.
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Atomically flat III-antimonide epilayers grown using liquid phase epitaxy
A multi-bin crucible made from high purity graphite and a quartz wafer carrier was used.
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http://dspace.mit.edu/bitstream/handle/1721.1/8761/48117574-MIT.pdf?sequence=2
Then the rotor wafer is attached to a quartz carrier wafer using a narrow ring of thick resist around the perimeter of the carrier wafer.
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http://dspace.mit.edu/bitstream/handle/1721.1/89324/49039158-MIT.pdf?sequence=2
Next the exposed device layer silicon was then attached to a 150 mm quartz carrier wafer because the DRIE etcher only accepts 150 mm wafers.
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Through-wafer trench-isolated electrical interconnects for CMUT arrays
The wafer front side is then temporarily bonded to a quartz carrier wafer , which provides mechanical support and optical transparency for later processing steps.
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