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Supplier: Integrated Device Technology
Description: The 87322BI is a low skew, ÷1/÷2 3.3V LVPECL / ECL Clock Generator. Using multiplexed/redundant clock inputs the 87322BI is designed to translate most differential signal levels to LVPECL / ECL levels. The CLK_SEL input selects between CLK0 , nCLK0 and CLK1
- Device Type: Clock Generator
- Bus Interface / Output Type: ECL, LVPECL, Other
- Package / Form Factor: Surface Mount Technology (SMT), Other
- Supply Voltage: 3.3 volts
Supplier: Microchip Technology, Inc.
Description: The SY100S834/L is low skew (÷1, ÷2, ÷4) or (÷2, ÷4, ÷8) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the
- Technology: LVPECL, PECL
- RoHS Compliant: true
- Supply Voltage: 3.3 V, 5 V
- IC Package Type: SOIC
Supplier: Integrated Device Technology
Description: The 8735BI -01 is a highly versatile 1:5 Differential- to-3.3V LVPECL clock generator. The 8735BI -01 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider, and has an output frequency range of 31.25MHz to 700MHz. The reference divider,
- Device Type / Applications: Buffer
- Supply Voltage: 3.3 V
- TJ: -40 to 185 F
- IC Package Type: Other
Supplier: Newark / element14
Description: IC, DIVIDE-BY-4 ECL DIVIDER, SOIC-8; No. of Inputs:2; Clock Frequency:4GHz; Supply Voltage Range:± 3V to ± 5.5V; Logic Case Style:SOIC; No. of Pins:8; Operating Temperature Range:-40°C to +85°C; Family Type:100EP
- Supply Voltage: -5 V, -4.5 V, -3.3 V, -3 V, 3 V, 3.3 V, 3.6 V, 5 V, Other
- Number of Inputs: 2
- Operating Temperature: -40 to 185 F
- Package Type: Other
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50S-1887 SMT Surface Mount Switch
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Static frequency dividers up to 133GHz in SiGe:C bipolar technology
Block diagram of CML frequency divider and of low-power ECL frequency divider .
COMPOUND SEMICONDUCTOR ELECTRONICS, THE AGE OF MATURITY
The performance of high speed ECL frequency dividers with both Si BJT and III-V HBTs is also shown in Fig. 19.
Automotive Radar Sensors in Silicon Technologies
It consists of two LC VCOs, a divide-by-three injection-locked circuit (ILC),1 a divide-by-32 emitter-coupled logic ( ECL ) fre- quency divider , a divide-by-8 static CMOS frequency divider, a CMOS phase/ .
A 83 GHz InP DHBT static frequency divider
ECL frequency divider core .
An analytical maximum toggle frequency expression and its application to optimising high-speed ECL frequency dividers - ePrints Soton
An analytical maximum toggle frequency expression and its application to optimising high-speed ECL frequency dividers .
The pursuit for low cost and low phase noise synthesized signal sources: Theory & optimization
A recent ECL frequency divider was characterized with a noise level about -172 dBc/Hz [proprietary information].
A Monolithic 5 GHz Frequency Divider IC Fabricated with a Standard Bipolar Technology
3 Nakazato, K. et al.: A 6 GHz ECL frequency divider using sidewall base contact structure.
Monolithic integration of a 5.3 GHz regenerative frequency divider using a standard bipolar technology
NAGATA, M.: 'A 6 GHz ECL frequency divider using sidewall base contact structure'.
A low-power 1-GHz super-regenerative transceiver with time-shared PLL control
During the OFF periods of the PLL, the phase states of both the sequential phase comparator and the ECL frequency divider are .
Advanced Integrated Communication Microsystems
 W. Fang, A. Brunnschweiler, and P. Ashburn, “An analytical maximum toggle frequency expression and its application to optimizing high-speed ECL frequency dividers ,” IEEE Journal of Solid State Circuits, Vol. 25, No. 4, pp. 920–931.