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JFET Application Note: Reset Transistor

From MOXTEK, Inc.

In JFETs designed primarily for silicon drift detectors and Si(Li) detectors,
the reset transistor is configured as shown in Figure 1, with the base
shorted to the source, the collector shorted to the gate, and the emitter
connected to the reset pad. Since the gate-source JFET junction is
reverse-biased, so is the collector-base junction of the reset transistor.
When a negative bias is applied to the reset pad, both junctions are
reverse-biased and the transistor is in cutoff mode, with essentially no
current flowing between collector and emitter. When a positive bias is
applied to the reset pad, the emitter-base junction is forward-biased,
and the transistor is in active mode, with current flowing from emitter to
collector (from reset pad to JFET gate).

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Junction field-effect transistors (JFET) consist of a semiconductor channel in which the width and the conductivity of the channel is controlled by the space-charge region associated with the p-n region.
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