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Supplier: Lingto Electronic Limited
Description: LVPECL-TO-LVDS TRANSLATOR
- Logic Family: Emitter Coupled Logic (ECL), PECL, LVDS
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Supplier: Lingto Electronic Limited
Description: LVPECL-TO-LVDS TRANSLATOR
- Logic Family: Emitter Coupled Logic (ECL), PECL, LVDS
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Supplier: Lingto Electronic Limited
Description: LVPECL-TO-LVDS TRANSLATOR
- Logic Family: Emitter Coupled Logic (ECL), PECL, LVDS
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Supplier: Rochester Electronics
Description: SN65LVDS101 2Gbps LVDS/LVPECL/CML to LVPECL Repeater/Translator
- Features: RoHS Compliant
- Logic Family: Emitter Coupled Logic (ECL)
- Package: SSOP, Other
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Supplier: Rochester Electronics
Description: SN65LVDS101 2Gbps LVDS/LVPECL/CML to LVPECL Repeater/Translator
- Features: RoHS Compliant
- Logic Family: Emitter Coupled Logic (ECL)
- Package: SOIC, Other
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Supplier: Rochester Electronics
Description: SN65LVDS101 2Gbps LVDS/LVPECL/CML to LVPECL Repeater/Translator
- Features: RoHS Compliant
- Logic Family: Emitter Coupled Logic (ECL)
- Package: SSOP, Other
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Supplier: Utmel Electronic Limited
Description: Translator LVPECL/LVDS/LVHSTL/S STL/HCSL to LVCMOS/LVTTL 8-Pin SOIC
- Features / Standards: RoHS Compliant
- Operating Temperature: -40 to 85 C
- Output Type: TTL, CMOS, ECL, PECL, LVPECL, LVDS
- Package / Form Factor: Surface Mount Technology (SMT)
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Supplier: Utmel Electronic Limited
Description: Translator CML/LVDS/LVPECL to LVCMOS/LVTTL 8-Pin SOIC N T/R
- Features / Standards: RoHS Compliant, Lead Free
- Operating Temperature: -40 to 85 C
- Output Type: TTL, CMOS, ECL, PECL, LVPECL, LVDS
- Package / Form Factor: Surface Mount Technology (SMT)
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Supplier: Integrated Device Technology
Description: channel 0 and the SEL1 pin for Channel 1. The differential input has a common mode range that can accept most differential input types such as LVPECL , LVDS , LVHSTL , SSTL , and HCSL . The 85356I can therefore be used as a differential translator to translate almost any
- IC Package Type: SOIC, Other
- Logic Family: Emitter Coupled Logic (ECL), Other
- Number of Inputs: 4
- Operating Temperature: -40 to 85 C
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Supplier: RS Components, Ltd.
Description: Differential (ECL) logic level translators that interface with ECL, PECL, CML, LVDS, HSTL, HCSL, TTL, and CMOS devices. Logic Family = ECL Logic Function = Translator Translation = TTL to ECL Output Type = ECL Maximum Propagation Delay
- Logic Family: Emitter Coupled Logic (ECL), Other
- Package: TSSOP
- Propagation Delay: 2 ns
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Supplier: RS Components, Ltd.
Description: Differential (ECL) logic level translators that interface with ECL, PECL, CML, LVDS, HSTL, HCSL, TTL, and CMOS devices. Logic Family = ECL Logic Function = Translator Translation = TTL to ECL Output Type = ECL Maximum Propagation Delay
- Logic Family: Emitter Coupled Logic (ECL), Other
- Package: SOIC
- Propagation Delay: 2 ns
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Supplier: RS Components, Ltd.
Description: Differential (ECL) logic level translators that interface with ECL, PECL, CML, LVDS, HSTL, HCSL, TTL, and CMOS devices. Logic Family = ECL Logic Function = Translator Translation = PECL to ECL Output Type = ECL Maximum Propagation Delay
- Logic Family: Emitter Coupled Logic (ECL), Other
- Package: SOIC
- Propagation Delay: 0.8600 ns
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Supplier: RS Components, Ltd.
Description: Dual LVPECL/LVDS to LVTTL Translator SO8 - Standard Logic - Logic Level Translators
- Logic Family: Emitter Coupled Logic (ECL), Other
- Package: SOIC
- Propagation Delay: 2.5 ns
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Supplier: Rochester Electronics
Description: MAX9374 Differential LVPECL-To-LVDS Translator
- Logic Family: Emitter Coupled Logic (ECL)
- Package: Other
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Supplier: Microchip Technology, Inc.
Description: The SY89321L is a differential LVPECL/CML/LVDSto-LV TTL translator requiring only a single +3.3V power.The SY89321L is functionally equivalent to the SY100EPT21L, but in an ultra-small 8-pin MLF® package that features a 70% smaller footprint. This ultra-small package and low skew
- Input Voltage: 3.3 volts
- Logic Family: LVDS, Other
- Operating Current: 20 mA
- Package: Other
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Supplier: Win Source Electronics
Description: Manufacturer: Silicon Labs Win Source Part Number: 140620-SI53304-B-GMR Packaging: Reel - TR Type: Fanout Buffer (Distribution), Multiplexer, Translator Number of Circuits: 1 Mounting: SMD (SMT) Input: CML, HCSL, LVCMOS, LVDS, LVPECL Output: CML, HCSL, LVCMOS
- Bus Interface / Output Type: CMOS, ECL, PECL, LVPECL, LVDS, Other
- Device Type: Clock Driver
- Operating Temperature: -40 to 85 C
- Output Frequency: 725 MHz
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ON Semiconductor NB4L52MNG, 16QFN EP, CML/ECL/LVCMOS/LVDS/LVTTL to LVPECL, Registered Translator, -2.5|-3.3|-5|2.5|3.3|5 V - Avnet Express
Registered Translator CML/ ECL /LVCMOS/ LVDS /LVTTL to LVPECL 16-Pin QFN EP Rail .
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A fast electronic system of the T0 start trigger detector for the ALICE experiment
… Cable Delay) RF cables ~30 m long, (FANOUT) four-output analog fanout modules, (LED CAEN 895) fast discriminators, (QTC) charge- to -time converters, (CFD) constant … … digital fanout device, (NIM– LVDS , LVDS–NIM) level translators , (V) analog signals, (NIM, ECL , LV TTL) standards for …
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http://pos.sissa.it/archive/conferences/132/053/SKADS%202009_053.pdf
Voltage to current translators are used at the output stage to meet stringent load termination requirements of the LVDS standard. ECL input as shown in Figure 3 is the simulated ran- dom data which is fed to …
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Page 122. Semiconductor parts with 100 in root number
3.3 V Dual Differential LVPECL/ LVDS to LVTTL Translator 2.5V / 3.3V ECL 2-Input Differential AND/NAND .
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Translators - Clock & Data Distribution
Translator , 1:2 Fanout Differential LVPECL / LVDS to LVTTL ECL .
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The Level-1 Trigger Muon Barrel System of the ATLAS experiment at CERN
Four variants have been built to be able to receive η or φ inputs, and either LVDS or ECL translators ( ECL from the front-end or LVDS receivers if inputs are coming from confirm planes or from the low−PT outputs). . … board receives front-end signals and performs a logical OR of signals belonging to the second (confirm …
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Quality tests of the LHCb muon chambers at the LNF production site
After a custom LVDS – ECL translator , the signals are acquired by VME TDC’s. With the current setup, 192 channels (equivalent to two fully equipped MWPCs of region R3) can be …
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MC100EPT26DR2G: Translator, 1:2 Fanout Differential LVPECL / LVDS to LVTTL
Translator , 1:2 Fanout Differential LVPECL / LVDS to LVTTL ECL .
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Page 53. Semiconductor parts with 100 in root number
3.3 V Dual LVTTL/LVCMOS to Differential LVPECL Translator 3.3V ECL /PECL/HSTL/ LVDS 2/4, 4/6 Clock Generation Chip .
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http://focus.ti.com/lit/ds/symlink/sn65lvds349.pdf
The -4 V to 5 V common-mode range allows usage in harsh• Logic Level Translator operating environments or accepts LVPECL, PECL,• Point- to -Point Baseband Data Transmission LVECL, ECL , CMOS, and LVCMOS levels withoutOver 100-Ω Media level shifting circuitry. Section for more details on the ECL/PECL to LVDS .