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Supplier: Microchip Technology, Inc.
Description: CREATE AND SAMPLE YOUR CUSTOM SM802 HERE The SM802xxx is a dual PLL clock generator that achieves ultra-low, 75fs RMS phase jitter. With 12 total outputs and dividers on each output, this device can generate 12 different frequencies up to 850MHz. It accepts a quartz
- Device Type: Clock Generator
- Output Frequency: 11.4 to 840 MHz
- Package / Form Factor: Other
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Supplier: Microchip Technology, Inc.
Description: The SM803xxx is a dual PLL clock generator that achieves ultra-low, 75fs RMS phase jitter. With 12 total outputs and dividers on each output, this device can generate 12 different frequencies up to 850MHz. It accepts a quartz crystal input or a reference clock
- Bus Interface / Output Type: CMOS, PECL, LVDS
- Device Type: Clock Generator
- Output Frequency: 12 to 850 MHz
- Package / Form Factor: Other
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Supplier: Microchip Technology, Inc.
Description: CREATE AND SAMPLE YOUR CUSTOM SM806 HERE The SM806 is a PLL clock generator that achieves ultra-low phase jitter (78 fs 12KHz to 20 MHz). With six total outputs and dividers on each output, this device can generate six different frequencies up to 875 MHz, from a
- Bus Interface / Output Type: CMOS, PECL, LVDS
- Device Type: Clock Generator
- Output Frequency: 12 to 875 MHz
- Package / Form Factor: Other
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Supplier: SiTime Corporation
Description: or 20 LVCMOS low-jitter clock outputs. It supports 4 additional clock inputs with Frac-N dividers, enabling virtually any input-to-output frequency translation configurations from 8 kHz to 2.1 GHz. This jitter cleaner integrates SiTime’s third-generation ApexMEMS™
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Supplier: Microchip Technology, Inc.
Description: CREATE AND SAMPLE YOUR CUSTOM SM813 HERE The SM813xxx is a dual PLL clock generator that achieves ultra-low, <115fs RMS phase jitter at 12KHz to 20MHz. With 8 total outputs and dividers on each output, this device can generate 8 different frequencies up to 850MHz. It
- Bus Interface / Output Type: CMOS, PECL, LVDS
- Device Type: Clock Generator
- Output Frequency: 12 to 850 MHz
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Supplier: SiTime Corporation
Description: -PLL architecture and programmable output drivers provide up to 10 differential or 20 LVCMOS low jitter clock outputs. It supports 4 additional clock inputs with Frac-N dividers, enabling virtually any input to output frequency translation configurations from 8 kHz
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Supplier: SiTime Corporation
Description: -PLL architecture and programmable output drivers provide up to 8 differential or 20 LVCMOS low jitter clock outputs. It supports 4 additional clock inputs with Frac-N dividers, enabling virtually any input to output frequency translation configurations from 8 kHz
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Supplier: Integrated Device Technology
Description: 8V19N408 is a fully integrated FemtoClock® NG Jitter Attenuator and Clock Synthesizer. The device is a high-performance clock solution for conditioning and frequency/phase management of wireless base station radio equipment boards and is optimized to deliver excellent
- Bus Interface / Output Type: LVPECL, LVDS, Other
- Features / Standards: Lead Free
- Operating Temperature: -40 to 85 C
- Output Frequency: 25 to 2949 MHz
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Supplier: Integrated Device Technology
Description: 8V19N407Z -24 is a fully integrated FemtoClock® NG Jitter Attenuator and Clock Synthesizer. The device is a high-performance clock solution for conditioning and frequency/phase management of wireless base station radio equipment boards and is optimized to deliver
- Bus Interface / Output Type: LVPECL, LVDS, Other
- Features / Standards: Lead Free
- Operating Temperature: -40 to 85 C
- Output Frequency: 25 to 2500 MHz
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Supplier: Integrated Device Technology
Description: 8V19N407Z -19 is a fully integrated FemtoClock® NG Jitter Attenuator and Clock Synthesizer. The device is a high-performance clock solution for conditioning and frequency/phase management of wireless base station radio equipment boards and is optimized to deliver
- Bus Interface / Output Type: LVPECL, LVDS, Other
- Features / Standards: Lead Free
- Operating Temperature: -40 to 85 C
- Output Frequency: 19.79 to 2000 MHz
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Supplier: Integrated Device Technology
Description: The 5P49EE602 is a programmable clock generator intended for low power, battery operated consumer applications.There are four internal PLLs, each individually programmable, allowing for up to six differrent output frequencies. The frequencies are generated from a single reference
- Bus Interface / Output Type: Other
- Clock Skew: 75 ps
- Device Type: Clock Generator
- Features / Standards: Lead Free
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Supplier: SiTime Corporation
Description: output drivers provide up to 10 differential or 20 LVCMOS low-jitter clock outputs. It supports 4 additional clock inputs with Frac-N dividers, enabling virtually any input-to-output frequency translation configurations from 8 kHz to 2.1 GHz. This clock generator
- Bus Interface / Output Type: CMOS, LVPECL, LVDS, Other
- Device Type: Clock Generator
- Operating Temperature: -40 to 85 C
- Output Frequency: 0.0080 to 2100 MHz
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Supplier: RS Components, Ltd.
Description: A range of PLL clock synthesizers from EXAR operating at 2.5/3.3V with integer dividers. These low power devices are optimized for use with a 25MHz crystal or system clock and generate outputs with very low phase noise jitter. 847-2936 XR81101-AA02-F 125MHz
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Supplier: RS Components, Ltd.
Description: A range of PLL clock synthesizers from EXAR operating at 2.5/3.3V with integer dividers. These low power devices are optimized for use with a 25MHz crystal or system clock and generate outputs with very low phase noise jitter. 847-2936 XR81101-AA02-F 125MHz
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Supplier: RS Components, Ltd.
Description: The AD9516-x/PCBZ evaluation boards, from Analog Devices, are designed for evaluation of the AD9516-x devices. The AD9516-x are very low noise PLL clock synthesizers featuring an integrated VCO, clock dividers, and up to 14 outputs. AD9516-x devices feature automatic
- Category: Development Suite / Kit
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Si5360 clock generators for high-speed networking, data center and communications equipment complement Skyworks’ Si5391/5341/5332 clock generators delivering higher levels of jitter performance with a greater number of clock outputs. (read more)
Browse Resonators Datasheets for Skyworks Solutions, Inc. -
212.5 MHz frequency for LVDS (Low Voltage Differential Signaling) oscillators are crucial for specific high-speed, high-precision applications. Learn how Aker’s LVDS oscillators perform at a faster rate and exhibit low jitter to maintain efficient system performance. (read more)
Browse Oscillators Datasheets for Aker Technology USA Corporation -
servers and GPUs, feeding ever-increasing compute workloads. These systems must meet stringent timing requirements to move massive amounts of data efficiently through the network: A single switch chip requires multiple low-jitter clocks that are resilient against power-supply noise; an active cable (read more)
Browse Network Synchronization Products Datasheets for SiTime Corporation -
, 14-output jitter attenuator) AD9545 (1 PPS synchronizer and adaptive clock translator) Clock inputs 3 differential 100 ? SMA clock inputs PPS input SYNC input 10 MHz input Internal references 100 (read more)
Browse Motor Controllers Datasheets for DigiKey -
The ECS-2520MVLC low-current oscillator with a stability rating of ±50 ppm over -40°C to +85°C. It is compatible with a 1.8 V, 2.5 V or 3.3 V power supply, and is available in a variety of output frequencies suitable for a wide array of clocking applications. The lowest (read more)
Browse Oscillators Datasheets for ECS Inc. International -
differential oscillators deliver ultra-low jitter reference clocks for SmartNICs, accelerator cards, and high-speed network equipment, ensuring data integrity over long-distance, high-rate transmission. Packaging and Interface Flexibility Interquip Electronics (read more)
Browse Oscillators Datasheets for Interquip Electronics Co., Ltd. -
The LVDS Series crystal clock oscillator achieves superb stability and low power consumption over a broad range of operating conditions and frequencies. The low jitter output clock signal, generated internally with a non-PLL oscillator design. The device, available on tape and reel, is contained (read more)
Browse Oscillators Datasheets for Interquip Electronics Co., Ltd. -
Analog Devices ADF4378 is a high-performance, ultra-low jitter, integer-N phased locked loop (PLL) with an integrated voltage-controlled oscillator (VCO) and system reference (SYSREF) retimer ideally suited for data converter and mixed-signal front end (MxFE) clock applications (read more)
Browse RF and Microwave Connectors Datasheets for DigiKey -
precise analysis of PAM-4 signals, complex modulation schemes, and ultra-low jitter clock distribution. The MSO8804HD's PAM-N analysis capabilities, combined with advanced jitter decomposition, provide the measurement accuracy required for 400G optical modules, 5G base station validation, and high (read more)
Browse Oscilloscopes Datasheets for Uni-Trend US -
ADI's ADN4620 is a dual-channel, signal isolated, low voltage differential signaling (LVDS) buffer that operates at up to 2.5 Gbps with very low jitter. The devices integrate ADI iCoupler technology enhanced for high-speed operation to provide drop-in galvanic isolation of LVDS (read more)
Browse Isolation Transformers Datasheets for DigiKey
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Supports Industrial Temperature Range of
D Low Jitter Clock Divider by /2, /3, /4.
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ADCs Sample IFs With 14-b Resolution | Content content from Microwaves & RF
The ADC integrates a low - jitter clock divider and crosspoint switches (any input can be assigned to any ADC channel), so the sampling rate is multiplexed across the number of channels, with 640 MSamples/s available for single-channel operation and 160 MSamples/s…
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Fast comms clocks get the digital treatment
Output divider Low jitter output clock .
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Page 14. Semiconductor parts with 801 in root number
V(cc): -0.5 to +4V; V(in/out): -0.5 to +0.5V; low jitter clock multiplier and divider with programmable delay and phase alignment .
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Page 7. Semiconductor parts with 580 in root number
V(cc): -0.5 to +4V; V(in/out): -0.5 to +0.5V; low jitter clock multiplier and divider with programmable delay and phase alignment .
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Experimental assessment of the cross coupling and polarization effects on ultra-wide band see-through-wall imaging reconstruction
We implement an acquisition module using an off-the-shelf Avnet Xilinx Virtex-4 FPGA board with a Texas Instrument CDC5801 low jitter clock multiplier/ divider , and two MAX1215 ADC evaluation boards with 2.2 GHz analog bandwidth and a 250Msps maximum…
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Design and Implementation of a Low-Cost Real-Time Ultra-Wide Band See-Through-Wall Imaging Radar System
We implement an acquisition module using off-the-shelf Avnet Xilinx Virtex-4 FPGA board with a Texas Instrument CDC5801 low jitter clock multiplier/ divider , and two MAX108 ADC evaluation boards with 2.2 GHz analog bandwidth and 170 MHz maximum sampling…
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A 0.13 /spl mu/m CMOS serializer for data and trigger optical links in particle physics experiments
The clock-multiplying PLL and the clock divider blocks provide low jitter clocks at different frequencies for the other circuit blocks.
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Reconfigurable ultra-wide band see-through-wall imaging radar system
A data acquisition module has been actualized using an off-the-shelf Avnet Xilinx Virtex-4 FPGA board with a Texas Instrument CDC5801 low - jitter clock multiplier/ divider , and two MAXI08 ADC evaluation boards with a 2.2 GHz analog bandwidth and…
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A 22-gb/s PAM-4 receiver in 90-nm CMOS SOI technology
A single phase rotator running at the baud rate, followed by an I/Q divider , provides low - jitter clocks with high accuracy.