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Standards and Technical Documents - Masking, Bronze Plate Nitriding Stop-Off 90Cu - 10Sn -- AMS2429ASupplier: Accuris
Description: Masking, Bronze Plate Nitriding Stop-Off 90Cu - 10Sn
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Standards and Technical Documents - MASKING, BRONZE PLATE Nitriding Stop-off 90Cu - 10Sn -- AMS2429ASupplier: SAE International
Description: This specification covers the engineering requirements for electrodeposition and removal of bronze plate.
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Supplier: Cypress Semiconductor Corp.
Description: Nonvolatile SRAM (nvSRAM) combines Cypress's industry leading SRAM technology with best-in-class SONOS nonvolatile technology. Under normal operation, nvSRAM behaves like a conventional asynchronous SRAM using standard signals and timing. nvSRAM performs parallel random access reads and writes as
- Density: 64 to 16,000 kbits
- Pin Count: 8 to 165
- Supply Voltage: 1.8 V, 3 V, 5 V
- Features: Commercial, Industrial, Military, Other
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Supplier: Deposition Sciences, Inc.
Description: operating at temperatures as high as 1000°C and can withstand the thermal shock of direct transition from liquid nitrogen to boiling water. MicroDyn coatings, including complex filters, can be patterned using both contact masking and photolithography. IsoDyn™ Low Pressure Chemical Vapor
- Coating: Antireflection, Beamsplitter, Dielectric, Filter, Mirror
- Materials: Glass, Substrate Fabrication
- Wavelength Range: IR, UV, Visible
- Features: North America, Other, United States Only
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Vertical Mirror Fabrication Combining KOH Etch and DRIE of (110) Silicon
Process flow for vertical mirror with double nitride masks .
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Introduction to Semiconductor Manufacturing Technology
By patterning silicon oxide or silicon nitride masking film, epitaxial layers can be grown at locations where the masking film is removed and silicon is exposed.
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MEMS Materials and Processes Handbook
SiO2 masks can be grown by thermal oxidation and subsequently patterned with HF or plasma etching, or they can be grown in specific areas by the LOCOS (local oxidation of silicon) process (which uses a nitride mask ) [7, 59].
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Introduction to Microfabrication 2nd Edition
nitride mask .
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Oxidation-induced stresses in the isolation oxidation of silicon
Before the deposition of the nitride mask , a thin oxide (known as the pad oxide) is grown on the silicon in order to reduce the stresses that result from the different thermal expansion coefficients of the silicon and the nitride.
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http://dspace.mit.edu/bitstream/handle/1721.1/46678/428128910-MIT.pdf?sequence=2
(a) Simulation results of the contours of hydrostatic pressure after oxidation using nitride mask ; (b) an SEM image of the fabricated waveguide using nitride hard mask.
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Spray etching 2 µm features in 304 stainless steel
The silicon nitride mask provides much better adhesion to the stainless steel substrate resulting in less undercut compared to the PR mask.
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Three-dimensional numerical simulation of local oxidation of silicon
The nitride mask bending stress is mod- eled in three dimensions by using the beam bending theory.
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ULSI Semiconductor Technology Atlas
Poly buffered LOCOS (PBLOCOS) incorporates a poly layer between the nitride mask and the pad oxide.
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http://dspace.mit.edu/bitstream/handle/1721.1/89364/51830267-MIT.pdf?sequence=2
Detail of stochiometric silicon- nitride masked pyramid, showing jagged edges and rough surface finish . . . . . . . . . . . . . . . . . . . . .