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Supplier: Lansdale Semiconductor, Inc.
Description: This line of M.S.I. SUHL devices was originally introduced by Sylvania. These devices are completely compatible with the TTL I and II families of SUHL devices.
- IC Package Type: DIP, Other
- Logic Family: TTL
- Number of Dividers in the Chip: 1
- Operating Temperature: -65 to 150 C
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Supplier: Lansdale Semiconductor, Inc.
Description: This line of M.S.I. SUHL devices was originally introduced by Sylvania. These devices are completely compatible with the TTL I and II families of SUHL devices.
- IC Package Type: DIP, Other
- Logic Family: TTL
- Number of Dividers in the Chip: 1
- Operating Temperature: -65 to 150 C
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Supplier: Rochester Electronics
Description: MICROCIRCUIT, DIGITAL, HS CMOS,PROGRAMMABLE DIVIDE-BY-N COUNTER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
- Logic Family: TTL, Standard CMOS / CMOS (4000)
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Supplier: Microchip Technology, Inc.
Description: Unique input termination and VTPin for DC-coupled and AC-coupled Inputs; CML, PECL, LVDS and HSTL LVDS compatible outputs TTL/CMOS inputs for select and reset Parallel programming capability Programmable divider ratios of 1, 2, 4, 8 and 16 Low voltage
- Clock Frequency: 2000 MHz
- IC Package Type: Other
- Logic Family: Other
- Operating Current: 70 mA
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Supplier: Microchip Technology, Inc.
Description: Unique input termination and VTPin for DC- and ACcoupled inputs; CML, PECL, LVDS and HSTL LVDS-compatible outputs TTL/CMOS inputs for select and reset Parallel programming capability Programmable divider ratios of 1, 2, 4, 8 and 16 Low voltage
- Clock Frequency: 2000 MHz
- IC Package Type: Other
- Logic Family: Other
- Operating Current: 75 mA
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Supplier: Microchip Technology, Inc.
Description: The SY89871U is a 2.5V/3.3V LVPECL output precision clock divider capable of accepting a high-speed differential clock input (AC or DC-coupled) CML, LVPECL, HSTL or LVDS clock input signal and dividing down the frequency using a programmable divider ratio to create a
- Clock Frequency: 2500 MHz
- IC Package Type: Other
- Logic Family: Other
- Operating Current: 50 mA
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Supplier: Microchip Technology, Inc.
Description: -coupled and AC-coupled Inputs; LVCMOS, LVTTL, CML, PECL, LVDS, and HSTL TTL/CMOS inputs for select and reset 100k EP-compatible LVPECL outputs Parallel programming capability Programmable divider ratios of 1, 2, 4, 8, and 16 Low-voltage operation 2.5V or 3.3V Output
- Clock Frequency: 2500 MHz
- IC Package Type: Other
- Logic Family: Other
- Operating Current: 50 mA
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Supplier: Littelfuse, Inc.
Description: levels allows the user to determine the condition of the line. In use, the resistor divider and the high input impedance of the CPC5712 make the circuit practically undetectable on the line. Features: Two Independent Programmable Level Detectors with Programmable Hysteresis
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.5 V, and 3.3 V interfaces using the separate logic supply, and it is specified to operate over a temperature range of -40°C to +105°C. The EV-ADAQ4381-4FMCZ evaluation board enables simple evaluation of the ADAQ4381-4 14-bit DAQ µModule. This evaluation board (read more)
Browse Voltage Dividers and Voltage References Datasheets for DigiKey -
. The high-performance PLL has a -239 dBc/Hz for normalized in-band phase noise floor, ultra-low 1/f noise, and a high phase/frequency detector (PFD) frequency that can achieve ultra-low in-band noise and integrated jitter. The fundamental VCO and output divider of the ADF4378 generate frequencies (read more)
Browse RF and Microwave Connectors Datasheets for DigiKey
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Genetic Programming IV
three-ported voltage divider subcircuits 480 three-way decomposition 5 time constant 391 time … … 231–2, 266 topologies, parameterized 2, 67 automatic creation by genetic programming 23–5 for circuits automatic … … T-shaped subcircuit 487 TTL (Transistor-Transistor Logic ) 157 tunable integrated 434 …
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Digital Electronics: Principles Devices and Applications Complete Document
… 578 Register direct addressing mode 534, 535, 536 Register file 528, 529–30 buffer register 529–30 general purpose registers 529, 530 instruction register 529 program counter 529 stack pointer … … Repetition code 41 Resistive divider network 474–5 Resistor transistor logic , see RTL Resolution-A/D … … Schmitt gates 88–91, 92 Schmitt trigger 358–60 Schmitt trigger-transfer characteristics 360 Schottky TTL 116, 124, 135–6 …
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A Frequency Synthesizer for Television Receivers
The purpose of the prescaler is to divide down the local oscil- lator high frequencies to a range that can be processed and counted by standard TTL logic . Output of the prescaler is then fed to the programmable divider which is the heart of the sys- tem.
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GaAs Fully Monolithic X Band SPDT Switch with Integrated TTL Compatible Driver
The TTL compatible logic driver interface was designed to generate complementary comnand signals for the switch. … BFL gates with an electrostatic protection circuitry on the output line as used in high frequency dividers . The control circuit performance was analyzed using the time domain CAD program CIRCEC where a specific model …
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Pulse Research Lab Launches New Programmable TTL/NECL Frequency Divider
… "" further="" divided="" by="" 1,="" 2,="" 4,="" or="" 8="" for="" the="" first-phase="" ecl="" and="" ttl ="" outputs="" and … … ratios="" are="" programmed ="" via="" a … The PRL-260ANT is for applications where a frequency divider or prescalar is needed for triggering or down-sampling, and the multiple logic inputs and outputs make it useful in mixed-logic environments.
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Pulse Research Lab Launches New Programmable TTL/NECL Frequency Divider
… "" further="" divided="" by="" 1,="" 2,="" 4,="" or="" 8="" for="" the="" first-phase="" ecl="" and="" ttl ="" outputs="" and … … ratios="" are="" programmed ="" via="" a … The PRL-260ANT is for applications where a frequency divider or prescalar is needed for triggering or down-sampling, and the multiple logic inputs and outputs make it useful in mixed-logic environments.
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Highly accurate positioning control method for piezoelectric actuators based on phase-shifting optoelectronics
The frequency division ratios are obtained with logic divider Zarlink SP8400 components which are programmable from 16 to 8206 to obtain signals s1 and s2 both at a frequency of exactly 20 MHz. The inhibitions are done with a TTL command signal generated with direct digital synthesis (DDS) (DS345 Stanford …
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A low-power 16-bit computer for space applications on UOSAT
The first divider circuit in each of the two clock divider chains and the highway control status latch use standard bipolar ( TTL ) logic , all remaining logic, memory, control and interfacing circuits use c.m.o.s. technology devices. The read-only memory uses two fuse- programmed c.m.o.s. devices, each storing 512 bytes …
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Electronics for engineers and natural scientists
… FamiHe, 447 logic Fan-In 449 fan-Out 449, 462 Faraday effect 316 color coding 95 fiber-fiber-coupling 316 fiber-optic sensor 316 FAST (Fairchild-Advanced-Schottky TTL ) 446,448,454 code … … layer 194 -, controllable voltage divider 205 -, triode region 196 … … 317 gate array 446, 521, 523 -, digital 540 -, channel 540 -, kanalloses 540, 539 -, programmable 540, 543 gate …
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Advances in Applied Materials and Electronics Engineering II
It integrates 20,000 typical gate ( logic and RAM), and may block transfer, programmable and can be configured online. … but acceptable 5V input level, this system very suitable for applications, because 5V TTL level exist in … … parallel data), myfifo (cache) of the output data, address decoding and control and clock divider design [5].