TABLE OF CONTENTS In this chapter, we look at floating-point instructions. The floating-point unit coprocessor supports several floating-point instructions. We describe the floating-point registers of the floating-point unit. The floating-point instructions include the four basic arithmetic operations on both single-precision and double-precision floating-point numbers. We give several examples to illustrate the application of these instructions. We conclude the chapter with a summary.
In the previous chapters, we have looked at arithmetic operations on integers. These operations are supported by the CPU. In the MIPS architecture, the floating-point operations are supported by a separate Floating-Point Unit (FPU), which is coprocessor 1. There are instructions that move data between the processor registers and the FPU registers. The FPU supports the basic arithmetic operations, including addition, subtraction, multiplication, and division. These operations are available for both single-precision and double-precision floating-point numbers.
A single-precision floating-point number takes 32 bits whereas the double-precision number takes 64 bits. These are useful in implementing the floating-point numbers supported by high-level languages. For example, the C float data type corresponds to the single-precision number and the double to the double-precision floating-point number.
When we have several formats to represent numbers, we need instructions to convert a number from one representation to another. The FPU instruction set includes instructions to do conversions among integers, and single-precision and double-precision floating-point numbers. For example, there are instructions to convert integers to double-precision floating-point numbers and vice versa. Such conversions are often done in high-level languages. Suppose we declared the following variables...
