Multi-Core Programming: Increasing Performance through Software Multithreading

Glossary

Numbers

64-bit mode
The mode in which 64-bit applications run on platforms with Intel Extended Memory 64 Technology (Intel EM64T).

See also compatibility mode.

A-C

advanced programmable interrupt controller (APIC)
The hardware unit responsible for managing hardware interrupts on a computing platform.
aliasing
A situation in which two or more distinct references map to the same address in memory or in cache.
alignment
The need for data items to be located on specific boundaries in memory. Misaligned data c an cause the system to hang in certain cases, but mostly it detrimentally affects performance. Padding helps keep data items aligned within aggregate data types.
architecture state
The physical resources required by a logical processor to provide software with the ability to share a single set of physical execution resources. The architecture state consists of the general purpose CPU registers, the control registers, and the advanced programmable interrupt controller (APIC). Each copy of the architecture state appears to software as a separate physical processor.
associativity
The means by which a memory cache maps the main RAM to the smaller cache. It defines the way cache entries are looked up and found in a processor.
atomic
Operations that are indivisible (hence, the reference to the atom), meaning that all the operations must be completed or none of them can be. Example atomic operations relevant to multi-core programming include access to shared (global) memory locations, database transactions, and any sequence of operations that, if interrupted, would leave...

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