Programming with Hyper-Threading Technology: How to Write Multithreaded Software for Intel IA-32 Processors

Glossary

A-F

affinity

See processor affinity.

Amdahl's Law
An equation first formulated in 1967 by Gene Amdahl that expresses the theoretical maximum performance of a multiprocessor system.
barrier
A form of synchronization that OpenMP uses to synchronize threads. All threads will wait at a barrier until threads in the parallel region have reached the barrier. By this means, threads can catch up with other threads before proceeding.
cache
An area of memory that exists between two components running at different speeds. On processors, caches provide an area in which data fetched from memory can be stored in anticipation of its use by the processor. Most processors have several levels of cache, so as to optimize the data movement.

See also L1 cache.

See also L2 cache.

cache blocking
An optimization technique that attempts to put all data a loop will use inside a block that can be loaded as a whole into the processor's cache. By this step, the data can be worked on intensively without necessitating fetches from memory.
cache coherency
A design used by all multi-processor systems today that requires processor caches to be updated anytime a variable they are caching is updated elsewhere on the system. In this manner, all cached copies of a variable are coherent, that is, at any given time they contain the same value.
cache line
The minimum amount of data that a processor loads into cache. On Intel x86 processors, cache lines are typically 64 or 128 bytes. If two threads place...

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