RF and Digital Signal Processing for Software-Defined Radio: A Multi-Standard Multi-Mode Approach

10.2: Filter Design and Implementation

10.2 Filter Design and Implementation

When dealing with decimation and interpolation, it is imperative for the designer to implement cost-effective, low-power filters. In this section, we introduce several filtering schemes that meet the low-power, cost-effective criteria while achieving the desired performance.

10.2.1 Polyphase Structures

The processes of downsampling and upsampling, as described thus far, can be further simplified. In single rate signal processing, a digital filter produces a single output sample for every input sample. In decimation, for example, the filter needs to process only every Mth output sample. This is true since only these samples will be retained after decimation. That is, in the time domain, the samples at the output of the filter that are relevant after decimation would be

The implication of (10.61) on the computational complexity of the filter will be discussed herein. Consider the direct-form FIR filter followed by the decimator shown in Figure 10.16(a). In this case, the filtering occurs at the high sampling rate before any rate reduction takes place. That is, the filtered sequence which constitutes the input to the decimator is the convolution computed in accordance with (10.62):


Figure 10.16: The filtering process in decimation: (a) direct form FIR followed by decimator and (b) decimation moved into the filter

In order to obtain the decimated sequence y( m), the downsampling process retains only every Mth sample and the remaining M ? 1 samples out of M samples are discarded. The pertinent question then is: do...

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