Help with Analog Comparators specifications:
Performance
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Supply Voltage (VS) | Supply voltage (VS) refers to the source voltage range. | ||
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Supply Current (IS) | Source current (IS) is the current produced by the supply source when connected to the amplifier. | ||
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Input Offset Voltage (VOS) | Input offset voltage (VOS) is the differential DC voltage required at the op-amp's two inputs in order force the output voltage to zero. This occurs when no load is connected to the amplifier. | ||
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Power Dissipation (PD) | Power dissipation (PD) is the maximum dissipation (in watts) that the amplifier can support safely. | ||
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CMRR | Common mode rejection ratio (CMRR) measures an amplifier's ability to reject input voltages that are common to both of its input terminals. CMRR is defined as the ratio of the differential gain to the common gain. Typically, this value is measured in decibels. | ||
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Operating Temperature | Operating temperature is specified by level (minTypMax) of the ambient temperature (in °C) in which the amplifier was designed to operate | ||
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Logic Output | |||
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TTL | Transistor-transistor logic (TTL) is a class of digital circuits built from bipolar junction transistors (BJT), diodes, and resistors. It is notable as it was the base for the first widespread semiconductor integrated circuit (IC) technology. All TTL circuits operate with a 5 V power supply. TTL signals are defined as "low" or L when between 0 V and 0.8 V with respect to the ground terminal, and "high" or H when between 2 V and 5 V. The first logic devices designed from bipolar transistors were referred to as standard TTL. The addition of Schottky diodes to the base collector of bipolar transistor was called Schottky logic (S-TTL). Schottky diodes shorten propagation delays within TTL by preventing the collector from going into what is called “deep saturation.” Other TTL technologies include low-power Schottky (LS-TTL), advanced Schottky (AS-TTL), advanced low-power Schottky (ALS-TTL), and low-voltage TTL (LVTTL). | ||
ECL | Emitter coupled logic (ECL) uses transistors to steer current through gates that compute logical functions. By comparison, TTL and related families use transistors as digital switches, where the transistors are either cut off or saturated depending on the state of the circuit. This distinction explains ECL's chief advantage: that because the transistors are always in the active region, they can change state very rapidly. ECL circuits can operate at very high speed which can also be a disadvantage. When the transistors are continually drawing current, they require higher power and thus generate large amounts of waste heat. ECL gates use differential amplifier configurations at the input stage. A bias configuration supplies a constant voltage at the midrange of the low and high logic levels to the differential amplifier. Then the appropriate logical function of the input voltages will control the amplifier and the base of the output transistor. The propagation time for this arrangement can be less than a nanosecond. Other noteworthy characteristics of the ECL family include little power-noise and negative power supplies. Since ECL circuits operate with negative power supplies, logic levels are incompatible with other families This means that interoperation between ECL and other designs are difficult. | ||
PECL | PECL refers to positive emitter coupling logic (PECL). | ||
CMOS | Complementary metal-oxide semiconductor (CMOS) logic uses a combination of p-type and n-type metal-oxide-semiconductor field effect transistors (MOSFET) to implement logic gates and other digital circuits found in computers, telecommunications, and signal processing equipment. | ||
CML | The logic output is current mode logic (CML). | ||
Differential | The amplifier has a differential output when two opposite-polarity signal voltages are produced at the output terminal. | ||
Open Drain | An open-drain output terminal connects the low-level voltage (logic zero, or 0 volts) to the ground. This is for a high-impedance, high-voltage terminal. | ||
Other | Other unlisted logic outputs. | ||
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RoHS Compliant
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RoHS Compliant | Restriction of Hazardous Substances (RoHS) is a European Union (EU) directive that requires all manufacturers of electronic and electrical equipment sold in Europe to demonstrate that their products contain only minimal levels of the following hazardous substances: lead, mercury, cadmium, hexavalent chromium, polybrominated biphenyl, and polybrominated diphenyl ether. RoHS will become effective on July 1, 2006. | ||
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Package Characteristics
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Package Type | |||
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DIP | Dual in-line package (DIP) is a type of semiconductor component packaging. DIPs can be installed either in sockets or permanently soldered into holes extending into the surface of the printed circuit board. The pins are distributed into two parallel lines along opposite site of the rectangular package. There are several types of DIP packages, such as Ceramic Dual in-line package (CDIP), Plastic Dual in-line package (PDIP), and Shrink Plastic Dual in-line package (SPDIP). | ||
CDIP | Ceramic dual in-line package (CDIP) consists of two pieces of dry pressed ceramic surrounding a "DIP formed" lead frame. The ceramic / LF / ceramic system is held together hermetically by frit glass reflowed at temperatures between 400° - 460° centigrade. | ||
PDIP | Plastic dual in-line package (PDIP) is widely used for low cost, hand-insertion applications including consumer products, automotive devices, logic, memory ICs, micro-controllers, logic and power ICs, video controllers commercial electronics, and telecommunications. | ||
DPAK | DPAK refers to a type of transistor outline package (T0-252). | ||
CSP | Chip scale package or chip size package (CSP) has an area that is no more than 20% larger than the built-in die. CSP is compact for second level packaging efficiency and encapsulated for second level reliability. CSP is superior to both direct-chip-attach (DCA) and chip-on-board (COB) technologies. CSP is used in a variety of integrated circuits (IC), including radio frequency ICs (RFIC), memory ICs, and communication ICs. | ||
SIP | SIP refers to a single inline package. | ||
SOIC | SOIC refers to a small outline IC. | ||
SSOP | SSOP refers to a shrink small outline package. | ||
SOP | SOP is a small outline package. | ||
MSOP | Mini small outline plastic package (MSOP) products are packed in tape reel assemblies that include a carrier tape with embossed cavities for storing individual components. The carrier tape is made from dissipative polystyrene resin. The cover tape is a multilayer film composed of a polyester film, adhesive layer, heat-activated sealant, and anti-static sprayed agent. The reel is made of polystyrene plastic (anti-static coated or intrinsic) and individually bar-coded. Reels are placed inside barcode-labeled boxes for shipping. | ||
SOT | SOT packaging refers to a small outline transistor. | ||
SOT23 | SOT23 is a rectangular, surface mounted, small outline transistor (SOT) package with three or more gull wing leads. SOT23 features a very small footprint and is optimized for the highest possible current. Because of its low cost and low profile, SOT23 is used in home appliances, office and industrial equipment, personal computers, printers, and communication equipment. | ||
PSOP | PSOP refers to a power small outline package. | ||
QFP | QFP is a quad flat package. | ||
TO-220 | Transistor outline (TO) is a standard package for discrete transistors. SOT package are JEDEC compliant. TO-220 is a TO package of size 220. | ||
TO-3 | Transistor outline (TO) is a standard package for discrete transistors. SOT package are JEDEC compliant. TO-3 is a TO package of size 3. | ||
SC-70 | SC-70 is one of the smallest available IC packages. It is used in cellular phones, PDAs, electronic games, laptops, and other portable and hand-held applications where space is extremely limited. | ||
TSSOP | TSSOP refers to thin shrink small outline L-leaded packages. | ||
QSOP | QSOP refers to a quarter size outline package. | ||
PLCC | PLCC refers to a plastic leaded carrier. | ||
UCSP | UCSP refers to an ultra chip scale package. | ||
Other | This refers to other unlisted, specialized, or proprietary packages. | ||
Search Logic: | All products with ANY of the selected attributes will be returned as matches. Leaving all boxes unchecked will not limit the search criteria for this question; products with all attribute options will be returned as matches. | ||
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Pin Count | Pin count is the number of physical connection points (e.g., pins, pads, balls) on the package. | ||
Search Logic: | User may specify either, both, or neither of the "At Least" and "No More Than" values. Products returned as matches will meet all specified criteria. | ||
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Number of Devices in Package | This refers to the number of devices in the package. | ||
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Features
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Complementary Outputs | The device has at least two outputs that are complementary. | ||
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Rail-to-Rail Input | The rail-to-rail input voltage can vary from the negative to the positive value of the supply voltage. | ||
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Rail-to-Rail Output | The rail-to-rail output voltage swing is measured from the negative to the positive value of the supply voltage. | ||
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On-Chip ESD Protection | The chip has embedded radiation protection. | ||
Search Logic: | "Required" and "Must Not Have" criteria limit returned matches as specified. Products with optional attributes will be returned for either choice. | ||
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Single Supply | The chip can operate with only one supply. | ||
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Thermal Shutdown Protection | The regulator has an embedded control circuit that shuts down the device when the temperature exceeds a predefined limit. | ||
Search Logic: | "Required" and "Must Not Have" criteria limit returned matches as specified. Products with optional attributes will be returned for either choice. | ||
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