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Supplier: Magma
Description: to provide an almost unlimited number of PCI slots* to a single computer. This type of scalability is especially useful in industries such as telecom, data acquisition, video monitoring, server storage, and manufacturing test fixtures. * As defined by the PCI Local Bus
- Form Factor: Full-Size PCI
- Number of ports: 13
- PCI Data Bus: 32-bit
- Product Type: PCI Bridge, PCI Extender
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Supplier: Tripp Lite by Eaton
Description: (a driver CD is included if they don’t), and connect DB9 serial extension cables (such as Tripp Lite’s P520-006) to the card’s DB9 connectors. The PCI-D9-02 is fully compliant with PCI Local Bus Specification Revision 2.3 and compatible with industrial
- Network / Bus: PCI
- Number of Ports: 2
- Serial Protocol: RS232
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Supplier: Tripp Lite by Eaton
Description: hard drive (a driver CD is included if they don’t), and connect DB9 serial extension cables (such as Tripp Lite’s P520-006) to the card’s DB9 connectors. The PCI-D9-02-LP is fully compliant with PCI Local Bus Specification Revision 2.3 and compatible with
- Network / Bus: PCI
- Number of Ports: 2
- Serial Protocol: RS232
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Supplier: SIE Computing Solutions, Inc.
Description: The Apollo 4022P Multiport serial controller is a UniversalPCI board compatible with the PCI Local Bus Specification Revision 2.2. The Apollo 4022P card operates in either a 5.0V or 3.3V signaling environment. However, the card must be installed in a
- Connector: DB25
- Data Rate: 230 kbps
- FIFO Buffers: 128-byte
- Mounting / Form Factor: Printed Circuit Board (PCB)
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Supplier: SIE Computing Solutions, Inc.
Description: The Saturn 4522P multiport serial controller is a Universal PCI board that is compatible with the PCI Local Bus Specification Revision 2.2. The Saturn 4522P card operates in either a 5.0V or 3.3V signaling environment. However, this card must be installed in
- Connector: DB25
- Data Rate: 256 kbps
- Device Type: Serial Adapter, Other
- Mounting / Form Factor: Printed Circuit Board (PCB)
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Supplier: SIE Computing Solutions, Inc.
Description: The Saturn 8522P multiport serial controller is a Universal PCI board that is compatible with the PCI Local Bus Specification Revision 2.2. The Saturn 8522P card operates in either a 5.0V or 3.3V signaling environment. However, this card must be installed in
- Connector: DB25
- Data Rate: 256 kbps
- FIFO Buffers: 128-byte
- Mounting / Form Factor: Printed Circuit Board (PCB)
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Supplier: Broadcom Inc.
Description: The ExpressLane™ PEX 8311 1-lane PCI Express (PCIe) to 32-bit, 66MHz generic local bus bridge offers complete protocol translations between these two standards. The device enables users to add scalable high bandwidth interconnection to a wide variety of applications
- Data Rate: 2.50E6 kbps
- Device Type: Packet Switching Fabric Chip
- IC Package Type: PBGA
- Interface: PCI Express, Other
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Supplier: Sealevel Systems, Inc.
Description: MIL-STD-1553B Notice 2 Bus Controller, Remote Terminal, Bus monitor with PCI interface IP Core for FPGA and ASIC Devices, Development License, Including 10 Prototype Units Allows you to easily incorporate robust MIL-STD-1553 functionality into an FPGA or ASIC and connect
- Certifications: MIL-STD-1553
- Technology: FPGA
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Supplier: ADLINK Technology Inc.
Description: The ADLINK PXIS-3320 is a 19" 6U PXI chassis comes with one system slot and 14 peripheral slots that flexibly supports PXI and CompactPCI modules. Compliant with the PXI specifications Rev. 2.2, the PXIS-3320 highlights a star trigger, PXI trigger bus, 10 MHz reference
- 6U CompactPCI / PXI Slots: 15
- Backplane Bus / Standard: PXI
- Backplane Form Factor: 6U (Size B)
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Supplier: Microchip Technology, Inc.
Description: LAN9420/LAN9420i is a full-featured, Fast Ethernet controller which allows for the easy and cost-effective integration of Fast Ethernet into a PCI-based system. LAN9420/LAN9420i consists of a PCI Local Bus Specification Revision 3.0 compliant interface, DMA
- Host Bus: Other
- Number of Ports: 1
- Operating Temperature: -40 to 85 C
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Supplier: Microchip Technology, Inc.
Description: to 2 SFF-8485-compliant SGPIO ports Up to 84 parallel GPIO pins 16-bit local bus interface with ECC protection Up to 4 UARTs JTAG and EJTAG interface High-speed I/O PCIe Gen 3 8 GT/s Supports PCIe-compliant link training and
- Product Type: Switch
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Supplier: Microchip Technology, Inc.
Description: to 2 SFF-8485-compliant SGPIO ports Up to 84 parallel GPIO pins 16-bit local bus interface with ECC protection Up to 4 UARTs JTAG and EJTAG interface High-speed I/O PCIe Gen3 8 GT/s Supports PCIe-compliant link training and
- Product Type: Switch
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Supplier: Microchip Technology, Inc.
Description: Up to 2 SFF-8485-compliant SGPIO ports Up to 84 parallel GPIO pins 16-bit local bus interface with ECC protection Up to 4 UARTs JTAG and EJTAG interface High-speed I/O PCIe Gen 3 8 GT/s Supports PCIe-compliant link training
- Product Type: Switch
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Supplier: ELMA Electronic Inc.
Description: .4 Revision 1.0 Specification PCI Express External Cabling Specification, Revision 2.0 PCI Express Base 2.1 Specification PCI Express CEM 2.0 Specification Architecture: Five / seven AXIe slots Base interface, Gigabit
- Board Function: Passive Backplane
- Bus / Standard: Other
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Supplier: ADLINK Technology Inc.
Description: ADLINK PXIS-2670 is a compact 14-slot PXI chassis that provides one system and 13 peripheral slots in a space-saving 483 mm x 178 mm x 258 mm dimension. Supporting both 3U PXI and CompactPCI modules, the PXIS-2670 chassis is compliant with PXI specification Rev. 2.2 and
- 3U CompactPCI / PXI Slots: 14
- Backplane Bus / Standard: PXI
- Backplane Form Factor: 3U (Size A)
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Supplier: Broadcom Inc.
Description: -OCP adapters adhere to the mezzanine card specification for OCP v2.0 motherboards. Virtual Network Exceleration (VNeX™) Overlay Network Offloads for Multi-Tenant Cloud Networking Scaling existing technologies for private or public multi-tenant infrastructures requires
- Data Rate: 6.40E7 kbps
- Host Bus: Other
- Number of Ports: 1
- Operating System: Linux?, Other
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Supplier: Broadcom Inc.
Description: -OCP adapters adhere to the mezzanine card specification for OCP v2.0 motherboards. Virtual Network Exceleration (VNeX™) Overlay Network Offloads for Multi-Tenant Cloud Networking Scaling existing technologies for private or public multi-tenant infrastructures requires
- Data Rate: 6.40E7 kbps
- Host Bus: Other
- Number of Ports: 2
- Operating System: Linux?, Other
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Supplier: Broadcom Inc.
Description: center hardware designs for scalable computing. The OCP designs are maximized for total cost of ownership (TCO), energy efficiency, and reduced complexity in the scalable computing space. The OCm14000-OCP adapter adheres to the mezzanine card specification for OCP v2.0 motherboards.
- Data Rate: 6.40E7 kbps
- Host Bus: Other
- Number of Ports: 2
- Operating System: Linux?, Other
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Supplier: ValueTronics International, Inc.
Description: accomplish local documentation or signal analysis. Installation of the oscilloscope on the LAN enables Web-based information browsing, e-mail exchange, printing and file sharing. Using the embedded PCI bus, waveform data can be moved directly from acquisition to analysis
- Bandwidth: 350 MHz
- Number of Input Channels: 2 (# channels)
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Supplier: ValueTronics International, Inc.
Description: local documentation or signal analysis. Installation of the oscilloscope on the LAN enables Web-based information browsing, e-mail exchange, printing and file sharing. Using the embedded PCI bus, waveform data can be moved directly from acquisition to analysis applications on
- Bandwidth: 500 MHz
- Number of Input Channels: 2 (# channels)
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Supplier: ValueTronics International, Inc.
Description: local documentation or signal analysis. Installation of the oscilloscope on the LAN enables Web-based information browsing, e-mail exchange, printing and file sharing. Using the embedded PCI bus, waveform data can be moved directly from acquisition to analysis applications on
- Bandwidth: 1000 MHz
- Number of Input Channels: 4 (# channels)
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Supplier: ValueTronics International, Inc.
Description: analysis. Installation of the oscilloscope on the LAN enables Web-based information browsing, e-mail exchange, printing and file sharing. Using the embedded PCI bus, waveform data can be moved directly from acquisition to analysis applications on the Windows desktop at much faster
- Bandwidth: 500 MHz
- Number of Input Channels: 4 (# channels)
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bandwidth of PCIe has doubled with each generation. The transfer rate per lane evolved from 2.5 GT/S (GTransfer/s) with a rate of 250 MB/s per lane in PCIe Gen 1, to 64 GT/s with a rate of 7.56 GB/s in PCIe Gen 6. PCIe Gen 4 is widely used in automotive systems currently. Gen 4 features 16 GT/s, with (read more)
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CPCI-CAN/200
… Interface (Layer 2, CANopen® or J1939) 1 or 2 Channel low-cost CompactPCI CAN Interface – Passive high-speed CAN interfaces according to ISO 11898, electrically isolated – PCI bus according to PCI Local Bus Specification 2.1 – Software drivers for …
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Transition-by-transition FSM traversal for reachability analysis in bounded model checking
[25] “ PCI local bus specification 2.1 ,” 1995.
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Design for testability to achieve high test coverage. A case study
To the PCI Bus through PCI Interface (as per PCI Local Bus Specification 2.1 ) To IEEE 1394Physical layer chip (as per Link-PHY interface of P1394a Draft Standard for a High Performance Serial Bus (Supplement) Draft 2.0) To the ATMEL …
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http://www.microsemi.com/document-portal/doc_download/130699-40mx-and-42mx-fpga-families-datasheet
The devices are fully compliant with the PCI Local Bus Specification (version 2.1 ).
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Formalization and Analysis of a Solution to the PCI 2.1 Bus Transaction Ordering Problem
The problem is also documented in Section 3.11 of the PCI Local Bus Specification Revision 2.1 , pages 116–117; however the severity of the problem is underestimated there.
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Serial‐HIPPI Network Interfaces Using the RoadRunnerPCI ASIC
The PCI Local Bus Specification (Version 2.1 ) prescribes a Little-Endian format for PCI buses; however, not all hosts accept data presented in this format.
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Formal Methods in Computer-Aided Design
PCI Local Bus Specification Rev 2.1 .
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Formal Methods in Computer-Aided Design
The problem is also documented in Section 3.11 of the PCI Local Bus Specification Revision 2.1 , pages 116-117; however the severity of the problem is under-estimated there.
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A Practical Guide for SystemVerilog Assertions
PCI Local Bus Specification Revision 2.1 s .
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PCI4451 Datasheet
• PCI Local Bus Specification Revision 2.1 /2.2 compliant .