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Supplier: Lansdale Semiconductor, Inc.
Description: The 5400/7400 series of transistor-transistor logic is a medium-speed, high-noise-immunity family of saturating integrated logic circuits designed for general digital logic applications requiring clock frequencies to 30MHz and switching speeds in the 12-15 ns range under moderate capacitive loading.
- Operating Temperature: -55 to 125 C
- Pin Count: 16
- Number of Bits: 1
- Package Type: DIP
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Supplier: Accuris
Description: MICROCIRCUIT, DIGITAL, RADIATION HARDENED, ADVANCED CMOS, QUADRUPLE S-R LATCH, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON
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Supplier: Lansdale Semiconductor, Inc.
Description: The 54S00/74S00 series of product is fabricated with a non-saturating Schottky clamped transistor technique. This family of TTL product consists of very high performance and high power devices.
- Propagation Delay: 10 ns
- Operating Temperature: -55 to 125 C
- Pin Count: 20
- Number of Bits: 1
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Supplier: Lingto Electronic Limited
Description: R-S LATCH, 4-FUNC, TTL
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Supplier: Acme Chip Technology Co., Limited
Description: R-S LATCH, 4-FUNC, TTL
- Features: Other
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Description: R-S LATCH 1-BIT, TTL
- Features: Other
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Supplier: Lansdale Semiconductor, Inc.
Description: The 5400/7400 series of transistor-transistor logic consists of medium speed TTL integrated circuits. This high noise immunity family was designed for general digital logic applications requiring clock frequencies to 30MHz and switching speeds in the 12-15 ns range under moderate capacitive
- Propagation Delay: 13 ns
- Operating Temperature: -55 to 125 C
- Pin Count: 16
- Number of Bits: 1
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Supplier: Rochester Electronics
Description: R-S Latch, 4-Func, 1-Bit, TTL, CDIP16
- Package Type: DIP
- Features: Other
- Logic Family: Transistor-Transistor Logic (TTL)
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Supplier: ERSAELECTRONICS PTE. LTD.
Description: R-S LATCH 1-BIT, TTL Product overview: 54LS279DM from National Semiconductor is a Logic IC for digital control, signal routing, level logic, timing, buffering, and embedded board design. It is useful for engineers and buyers comparing datasheets, replacement parts, BOM lines,
- Operating Temperature: -55 to 125 C
- IC Package Type: Other
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Supplier: Richardson RFPD
Description: 8-bit TTL/CMOS compatible input port is used to load data into any of the four DAC data-latches. Control lines DS1, DS2, and A/B determine which DAC will accept data. Data loading is similar to that of a RAMs write cycle. Data can be read back onto the same data bus with control line
- Resolution: 12 bits
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Supplier: Nexperia B.V.
Description: mA per JESD 78 Class II Level B Input levels: For 74HC153-Q100: CMOS level For 74HCT153-Q100: TTL level Non-inverting outputs Separate enable input for each output Common select inputs Permits multiplexing from n lines to 1 line Enable line provided for cascading (n lines to 1 line) Complies
- Features: ESD Protection, Other
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Supplier: ValueTronics International, Inc.
Description: programmable Signal Level: 1Vp-p (min), 42Vpk (max) Threshold: 0V or TTL, jumper selectable Gate Input: TTL-Hi, TTL-Lo, or none Count Reset: Manual or Read+Reset Read Speed: 50/s Analog Voltage Output DAC 1, 2: ±12V in 1mV increments, nonisolated Resolution: 1mV Iout: 5mA
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Supplier: OMEGA Engineering, Inc.
Description: conductivity/resistivity module or via CDTX-2850 (For conductivity/resistivity models see omega.com/ dpu91_conductivity) Input Specifications Digital Serial: ACSII, TTL level, 9600 bps Frequency Input: Sensitivity: 80 mV @ 5 Hz, gradually increasing with frequency Span: 0.5 Hz to 1500 Hz @
- Electrical Output: Analog Current
- Features: Digital Display, Digital Front Panel
- Interface Options: Serial / Digital
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outputs may be inhibited with a TTL level. SPECIFICATIONS INPUT Voltage: 90-132 VAC, 49-61 Hz, single phase. Startup Time: 400 mS maximum (250 mS typical). Undervoltage: An input of less than 90 VAC (180 VAC with "-230" option) will not damage (read more)
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A, UT54ACTS5
Quadruple S - R latch . TTL compatible I/O level.
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A digital trigger delay unit for use in variable-path-length ultrasonic measurements
The incoming trigger signal is made TTL compatible by a diode clamp and buffer circuit at the … An S - R latch (4SN74279) with inverters is used as an S-R flip-flop to hold counter B reset.
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A VLSI-based biological interface for prosthetic devices
This gate interprets the TTL pulses emerging from the reuromime, and uses them to clock a four … Composed of four master- zlave S - R latches , the circuit can excite the \bindings of the stepper motor in both forward 2nd reverse directions .
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A VLSI-based biological interface for extracellular potentials
Organized as shown in figure 3, the gate interprets the TTL pulses emerging from the Neuromime, and … Composed of four master-slave S - R latches , the circuit can excite the windings of the stepper motor in both forward and reverse directions at a pace with the Neuromime output.
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Bases of the control technique
… 99 function diagram 86 function equation 11 FUP 130 gate 10, 13 Mutual locking 154, 162 Clocked … … with 0 and 1 16 oscillator 101 Pneumatic control 173 Pneumatic energy flow 173 positives logic 11 program 128 program 134 programming apparatus 130 Propagation time 143 Prozessgeführte sequence control 109 pseudotetrads 9 pulsing generators 103 R-dominant 90, 91, 172 code … Break contact 137, 141 S -command 114 switching algebra 11, 13 switching conditions 140 switches 11 switching networks 86, 7 rear … … control 134 clock signal 101 Transition 108 the 128, 134 Forbidden zone 11 delay element Verbindungsprogrammiert TTL circuits 10 transition function …
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Over the Xanthom, in particular Histiologie of which and Histiogenese
I believe, the young Xanthomzelle enthhlt yon of track pathological to beginning ihre.r on Fe.ttl , e) is. s now, that sis.dasselbe, of its e.ige.nen protoplasm in succession. e.ine.r it of de.m Embryonalle.ben immane … In the large number yon traps which it saw batten always already minimum atoms the cbarakteristische citronengelbe …
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A TTL programmable logic array and its applications
The design in Fig. 1uses several TTL devices SN 7400,7410,7486, and 74175. 4-bit latch 74175 is featured with docked enable (stroke) and the direct dear control. These features greatly facilitate the addressingand programmingschemesto be d e s c r i i below.
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A comparative study of noise properties of Si IMPATT diodes operating at 80 GHz
The design in Fig. 1uses several TTL devices SN 7400,7410,7486, and 74175. 4-bit latch 74175 is featured with docked enable (stroke) and the direct dear control. These features greatly facilitate the addressingand programmingschemesto be d e s c r i i below.
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Measured Flip-Flop Responses to Marginal Triggering
4) Custom NMOS S R type flip-flop using a 5 ,um feature size, polysilicon gate process [9]. . a mean circuit in a batch of 10 7475 TTL latches , and from five different vendors" [8].
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A 12-bit successive-approximation-type ADC with digital error correction
outputs are TTL /CMOS compatible. The 14-bit shift register, logic gating, correction logic, latches , and up/down counter form the Smart SAR … This reset sets the MSB of the 14-bit shift register to logic ONE and the rest of the bits to S - R ,%UP/LIOWN COUNTER .